參數(shù)資料
型號: ADE7761ARSRL
廠商: ANALOG DEVICES INC
元件分類: 模擬信號調(diào)理
英文描述: Energy Metering IC with On-Chip Fault and Missing Neutral Detection
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO20
封裝: MO-150AE, SSOP-20
文件頁數(shù): 19/28頁
文件大?。?/td> 302K
代理商: ADE7761ARSRL
ADE7761
Table 5. F
1–4
Frequency Selection
S1
S0
0
0
0
1
1
0
1
1
1
Values are generated using the nominal frequency of 450 kHz.
2
F
1–4
are a binary fraction of the master clock and, therefore, vary with the
internal oscillator frequency (OSC).
Frequency Output CF
The pulse output calibration frequency (CF) is intended for use
during calibration. The output pulse rate on CF can be up to
2048 times the pulse rate on F1 and F2. The lower the F
1–4
frequency selected, the higher the CF scaling. Table 6 shows
how the two frequencies are related, depending on the states of
the logic inputs S0, S1, and SCF. Because of its relatively high
pulse rate, the frequency at this logic output is proportional to
the instantaneous active power. As with F1 and F2, the
frequency is derived from the output of the low-pass filter after
multiplication. However, because the output frequency is high,
this active power information is accumulated over a much
shorter time. Therefore, less averaging is carried out in the
digital-to-frequency conversion. With much less averaging of
the active power signal, the CF output is much more responsive
to power fluctuations (see Figure 20).
Rev. A | Page 19 of 28
F
1–4
(Hz)
1
1.72
3.44
6.86
13.7
OSC/CLKIN
2
OSC/2
18
OSC/2
17
OSC/2
16
OSC/2
15
Table 6. Relationship between CF and F1, F2 Frequency
Outputs
SCF
S1
S0
F
1–4
(Hz)
1
0
0
1.72
0
0
0
1.72
1
0
1
3.44
0
0
1
3.44
1
1
0
6.86
0
1
0
6.86
1
1
1
13.7
0
1
1
13.7
Example
In this example, if ac voltages of ±660 mV peak are applied to
V1 and V2, then the expected output frequency on CF, F1, and
F2 is calculated as follows:
CF Frequency Output
128 × F1, F2
64 × F1, F2
64 × F1, F2
32 × F1, F2
32 × F1, F2
16 × F1, F2
16 × F1, F2
2048 × F1, F2
F
1–4
= 1.7 Hz, SCF = S1 = S0 = 0
V1
rms
= rms of 660 mV peak ac = 0.66/√2 V
V2
rms
= rms of 660 mV peak ac = 0.66/√2 V
V
REF
= 2.5 V (nominal reference value)
Note that if the on-chip reference is used, actual output
frequencies may vary from device to device due to a reference
tolerance of ±8%.
Hz
0
22
64
Hz
34
.
5
×
2
2
=
Hz
72
.
2
66
.
66
.
70
.
2
1
×
=
=
×
×
×
×
=
F
F
Frequency
CF
Frequency
F
F
2
1
As can be seen from these two example calculations, the
maximum output frequency for ac inputs is always half of that
for dc input signals. Table 7 shows a complete listing of all
maximum output frequencies for ac signals.
Table 7. Maximum Output Frequency on CF, F1, and F2 for
AC Inputs
SCF
1
0
1
0
1
0
1
0
FAULT DETECTION
The ADE7761 incorporates a novel fault detection scheme that
warns of fault conditions and allows the ADE7761 to continue
accurate billing during a fault event. The ADE7761 does this by
continuously monitoring both the phase and neutral (return)
currents. A fault is indicated when these currents differ by more
than 6.25%. However, even during a fault, the output pulse rate
on F1 and F2 is generated using the larger of the two currents.
Because the ADE7761 looks for a difference between the voltage
signals on V
1A
and V
1B
, it is important that both current trans-
ducers be closely matched.
S1
0
0
0
0
1
1
1
1
S0
0
0
1
1
0
0
1
1
F1, F2 Maximum
Frequency (Hz)
0.34
0.34
0.68
0.68
1.36
1.36
2.72
2.72
CF Maximum
Frequency (Hz)
43.52
21.76
43.52
21.76
43.52
21.76
43.52
5570
CF to
F1
Ratio
128
64
64
32
32
16
16
2048
On power-up, the output pulse rate of the ADE7761 is pro-
portional to the product of the voltage signals on V
1A
and
Channel 2. If there is a difference of greater than 6.25% between
V
1A
and V
1B
on power-up, the fault indicator (FAULT) becomes
active after about 1 s. In addition, if V
1B
is greater than V
1A
, the
ADE7761 selects V
1B
as the input. The fault detection is
automatically disabled when the voltage signal on Channel 1 is
less than 0.3% of the full-scale input range. This eliminates false
detection of a fault due to noise at light loads.
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