參數(shù)資料
型號: ADE7169ACPZF16
廠商: ANALOG DEVICES INC
元件分類: 模擬信號調理
英文描述: Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
中文描述: SPECIALTY ANALOG CIRCUIT, QCC64
封裝: 9 X 9 MM, ROHS COMPLIANT, MO-22-VMMD-4, LFCSP-64
文件頁數(shù): 67/140頁
文件大?。?/td> 1359K
代理商: ADE7169ACPZF16
Preliminary Technical Data
ADE7169F16
Rev. PrD | Page 67 of 140
1
1
1 minute
Table 46. Temperature and Supply Delta SFR (DIFFPROG, 0xF3)
Bit
Location
Mnemonic
7-6
Reserved
5-3
TEMP_DIFF[2:0]
Bit
Default
Value
Description
0
0
Reserved
Difference threshold between last temperature measurement interrupting 8052
and new temperature measurement that should interrupt 8052
TEMP_DIFF[2:0]
0
0
0
No Interrupt
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Every Temperature measurement
Difference threshold between last supply voltage measurement interrupting
8052 and new temperature measurement that should interrupt 8052
VSW_DIFF[2:0]
0
0
0
No Interrupt
< 1 LSB (
0.8
°
C)
1 LSB (
1.6
°
C)
2 LSB (
3.2
°
C)
0
0
0
1
1
1
0
1
1
0
0
1
1
0
1
0
1
0
< 1 LSB (
15mV)
1 LSB (
120 mV)
2-0
VSW_DIFF[2:0]
0
1
1
1
Every VSW measurement
Table 47. Start ADC Measurement SFR (ADCGO, 0xD8)
Bit
Location
Addr.
Name
7
0xDF
PLLACK
Bit
Bit
Default
Value
Description
0
Set this bit to clear the PLL fault bit, PLL_FLT in the PERIPH register. A PLL
fault is generated if a reset was caused because the PLL lost lock.
Reserved
6-3
0xDE –
0xDB
0xDA
Reserved
0
2
VADC
0
Set this bit to initiate a supply voltage measurement. This bit will be
cleared when the measurement request is received by the ADC.
Set this bit to initiate a temperature measurement. This bit will be cleared
when the measurement request is received by the ADC.
Set this bit to initiate a battery measurement. This bit will be cleared when
the measurement request is received by the ADC.
1
0xD9
TADC
0
0
0xD8
BTADC
0
Table 48. Battery detection threshold SFR (BATVTH, 0xFA)
Bit
Location
Mnemonic
7-0
BATVTH
Bit
Default
Value
Description
0
The battery ADC value is compared to this register, the battery threshold
register. If BATADC is lower than the threshold, an interrupt is generated.
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