參數(shù)資料
型號(hào): ADE7169ACPZF16-RL
廠商: ANALOG DEVICES INC
元件分類: 模擬信號(hào)調(diào)理
英文描述: Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
中文描述: SPECIALTY ANALOG CIRCUIT, QCC64
封裝: 9 X 9 MM, ROHS COMPLIANT, MO-22-VMMD-4, LFCSP-64
文件頁(yè)數(shù): 45/140頁(yè)
文件大?。?/td> 1359K
代理商: ADE7169ACPZF16-RL
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Preliminary Technical Data
ADE7169F16
The ADE7169F16 automatically switches from one channel to
the other and reports the channel configuration in the
ACCMODE register (0x0F).
Rev. PrD | Page 45 of 140
The current channel selected for measurement can also be
forced. Setting one of the SELCH1A and SELCH1B bits in the
CALMODE register (0x3D) selects I
A
and I
B
respectively. When
both bits are cleared or set, the current channel used for
measurement is selected automatically based on the Fault
detection.
Fault Indication
The ADE7169F16 provides an indication of the part going in or
out of a fault condition. The new fault condition is indicated by
the FAULTSIGN flag (bit5) in the Interrupt Status Register 1
SFR (MIRQSTL, 0xDC).
When FAULTSIGN bit (bit 6) of ACCMODE register (0x0F) is
cleared, the FAULTSIGN flag in the Interrupt Status Register 1
SFR (MIRQSTL, 0xDC) will be set when the part is entering
fault condition.
When FAULTSIGN bit (bit 6) of ACCMODE register (0x0F) is
set, the FAULTSIGN flag in the Interrupt Status Register 1 SFR
(MIRQSTL, 0xDC) will be set when the part is entering normal
condition.
When the FAULTSIGN bit is set in the Interrupt Enable
Register 1 SFR (MIRQENL, 0xD9), and the FAULTSIGN flag in
the Interrupt Status Register 1 SFR (MIRQSTL, 0xDC) is set,
the 8052 core has a pending ADE interrupt.
Fault with Active Input Greater than Inactive
Input
If I
A
is the active current input (that is, being used for billing),
and the voltage signal on I
B
(inactive input) falls below 93.75%
of I
A
, and the FAULTSIGN bit (bit 6) of ACCMODE register
(0x0F) is cleared, the FAULTSIGN flag in the Interrupt Status
Register 1 SFR (MIRQSTL, 0xDC) is set. Both analog inputs are
filtered and averaged to prevent false triggering of this logic
output. As a consequence of the filtering, there is a time delay of
approximately 3 s on the logic output after the fault event. The
FAULTSIGN flag is independent of any activity. Because I
A
is
the active input and it is still greater than I
B
, billing is
maintained on I
A
, that is, no swap to the I
B
input occurs. I
A
remains the active input.
Fault with Inactive Input Greater than Active
Input
If the difference between I
B
, the inactive input, and I
A
, the active
input (that is, being used for billing), becomes greater than
6.25% of I
B
, and the FAULTSIGN bit (bit 6) of ACCMODE
register (0x0F) is cleared, the FAULTSIGN flag in the Interrupt
Status Register 1 SFR (MIRQSTL, 0xDC) is set. The analog
input I
B
becomes the active input. Again, a time constant of
about 3 s is associated with this swap. I
A
does not swap back to
the active channel until I
A
is greater than I
B
and the difference
between I
A
and I
B
—in this order—becomes greater than 6.25%
of I
B
. However, if FAULTSIGN bit (bit 6) of ACCMODE
register (0x0F) is set, the FAULTSIGN flag in the Interrupt
Status Register 1 SFR (MIRQSTL, 0xDC) will be set as soon as
I
A
is within 6.25% of I
B
. This threshold eliminates potential
chatter between I
A
and I
B
.
Calibration Concerns
Typically, when a meter is being calibrated, the voltage and
current circuits are separated as shown in Figure 23. This means
that current passes through only the phase or neutral circuit.
Figure 23 shows current being passed through the phase circuit.
This is the preferred option, because the ADE7169F16 starts
billing on the input I
A
on power-up. The phase circuit CT is
connected to I
A
in the diagram. As the current sensors are not
perfectly matched, it is important to match current inputs. The
ADE7169F16 provides a gain calibration register for I
B,
IBGAIN
(address 0x1C). IBGAIN is a 12-bit signed 2-complement
register that provides a gain resolution of 0.0244%/LSB.
For calibration, a first measurement should be done on I
A
by
setting SEL_I_CH bits to 0b01 in the CALMODE register
(0x3D). This measurement should be compared to the
measurement on I
B
. Measuring I
B
can be forced by setting
SEL_I_CH bits to 0b10 in the CALMODE register (0x3D). The
Gain error between these two measurements can be evaluated
using:
( )
Measuremen
(
)
(
)
(
)
A
A
B
I
t
I
t
Measuremen
I
t
Measuremen
Error
=
%
The two channels I
A
and I
B
can then be matched by writing: –
Error(%) / (1 + Error (%)) * 2
12
to IBGAIN register. This
matching adjustment will be valid for all energy measurements,
Active power, reactive power, Irms, and Apparent power, made
by the ADE7169F16.
AGND
I
B
I
N
I
A
R
F
R
F
C
F
C
F
CT
CT
RB
RB
0V
V
A
0
IB
P
N
RF
RA
V
P
R
F
V
N
C
T
C
F
V
TEST
CURRENT
240V RMS
Figure 23. Fault Conditions for Inactive Input Greater than Active Input
di/dt CURRENT SENSOR AND
DIGITAL INTEGRATOR
A di/dt sensor detects changes in magnetic field caused by ac
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