參數(shù)資料
型號(hào)： ADCMP567BCP
廠商： ANALOG DEVICES INC
元件分類(lèi)： 運(yùn)動(dòng)控制電子
英文描述： Dual Ultrafast Voltage Comparator
中文描述： DUAL COMPARATOR, 5000 uV OFFSET-MAX, 0.3 ns RESPONSE TIME, QCC32
封裝： MO-220VHHD-2, LFCSP-32
文件頁(yè)數(shù)： 6/17頁(yè)
文件大?。?/td> 362K
代理商： ADCMP567BCP
ADCMP567
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Rev. 0 | Page 6 of 16
03632-0-002
PIN 1
INDICATOR
ADCMP567
TOP VIEW
(Not to Scale)
V
EE
24
23 NC
22 V
EE
21 V
CC
20 V
CC
19 V
EE
18 NC
17 V
EE
GND
–INA
+INA
V
CC
V
+INB
–INB
GND
3
G
L
L
N
V
D
1
Q
Q
V
D
1
1
2
3
4
5
6
7
8
3
3
N
2
2
2
2
D
2
D
NC = NO CONNECT
Figure 2. ADCMP567 Pin Configuration
Table 3. ADCMP567 Pin Descriptions
Pin No.
Mnemonic
1
GND
2
INA
Function
Analog Ground
Inverting analog input of the differential input stage for Channel A. The inverting A input must be driven
in conjunction with the noninverting A input.
Noninverting analog input of the differential input stage for Channel A. The noninverting A input must
be driven in conjunction with the inverting A input.
Positive Supply Terminal
Positive Supply Terminal
Noninverting analog input of the differential input stage for Channel B. The noninverting B input must
be driven in conjunction with the inverting B input.
Inverting analog input of the differential input stage for Channel B. The inverting B input must be driven
in conjunction with the noninverting B input.
Analog Ground
Analog Ground
One of two complementary inputs for Channel B Latch Enable. In the compare mode (logic low), the
output will track changes at the input of the comparator. In the latch mode (logic high), the output will
reflect the input state just prior to the comparator’s being placed in the latch mode. LEB must be driven
in conjunction with LEB.
One of two complementary inputs for Channel B Latch Enable. In the compare mode (logic high), the
output will track changes at the input of the comparator. In the latch mode (logic low), the output will
reflect the input state just prior to the comparator’s being placed in the latch mode. LEB must be driven
in conjunction with LEB.
No Connect. Leave pin unconnected.
Logic Supply Terminal
One of two complementary outputs for Channel B. QB will be at logic low if the analog voltage at the
noninverting input is greater than the analog voltage at the inverting input (provided the comparator is
in the compare mode). See the LEB description (Pin 11) for more information.
One of two complementary outputs for Channel B. QB will be at logic high if the analog voltage at the
noninverting input is greater than the analog voltage at the inverting input (provided the comparator is
in the compare mode). See the LEB description (Pin 11) for more information.
Logic Supply Terminal
Negative Supply Terminal
No Connect. Leave pin unconnected.
Negative Supply Terminal
Positive Supply Terminal
Positive Supply Terminal
3
+INA
4
5
6
V
CC
V
CC
+INB
7
INB
8
9
10
GND
GND
LEB
11
LEB
12
13
14
NC
V
DD
QB
15
QB
16
17
18
19
20
21
V
DD
V
EE
NC
V
EE
V
CC
V
CC
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