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| 型號： | ADCMP565BP |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 13/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC COMP DUAL ULTRA-FAST 20-PLCC |
| 標(biāo)準(zhǔn)包裝： | 49 |
| 類型： | 帶鎖銷 |
| 元件數(shù)： | 2 |
| 輸出類型： | 補(bǔ)充型，差分，ECL，開路發(fā)射極 |
| 電壓 - 電源，單路/雙路(±)： | ±4.75 V ~ 5.25 V |
| 電壓 - 輸入偏移（最小值）： | 6mV @ 5V |
| 電流 - 輸入偏壓（最小值）： | 40µA @ 5V |
| 電流 - 輸出（標(biāo)準(zhǔn)）： | 30mA |
| 電流 - 靜態(tài)（最大值）： | 18mA，80mA |
| CMRR, PSRR（標(biāo)準(zhǔn)）： | 69dB CMRR |
| 傳輸延遲（最大）： | 0.375ns |
| 磁滯： | ±1mV |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 20-LCC（J 形引線） |
| 安裝類型： | 表面貼裝 |
| 包裝： | 管件 |
| 配用： | EVAL-ADCMP565BPZ-ND - BOARD EVALUATION ADCMP565BPZ |
ADCMP565
Rev. 0 | Page 6 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
3
2
1
20
19
910
11
12 13
18
17
16
15
14
4
5
6
7
8
PIN 1
IDENTIFIER
NC = NO CONNECT
GND
LEA
NC
VEE
GND
LEB
NC
VCC
ADCMP565
TOP VIEW
(Not to Scale)
QA
NC
QB
–IN
A
+I
NA
NC
+I
NB
–IN
B
QA
LEA
LEB
QB
02820-0-002
Figure 2. ADCMP565 Pin Configuration
Table 3. ADCMP565 Pin Descriptions
Pin No.
Mnemonic
Function
1
NC
No Connect. Leave pin unconnected.
2
QA
One of two complementary outputs for Channel A. QA will be at logic high if the analog voltage at the
noninverting input is greater than the analog voltage at the inverting input (provided the comparator is
in the compare mode). See the LEA description (Pin 5) for more information.
3
QA
One of two complementary outputs for Channel A. QA will be at logic low if the analog voltage at the
noninverting input is greater than the analog voltage at the inverting input (provided the comparator is
in the compare mode). See the LEA description (Pin 5) for more information.
4
GND
Analog Ground
5
LEA
One of two complementary inputs for Channel A Latch Enable. In the compare mode (logic high), the
output will track changes at the input of the comparator. In the latch mode (logic low), the output will
reflect the input state just prior to the comparator’s being placed in the latch mode. LEA must be driven
in conjunction with LEA.
6
NC
No Connect. Leave pin unconnected or attach to GND (internally connected to GND).
7
LEA
One of two complementary inputs for Channel A Latch Enable. In the compare mode (logic low), the
output will track changes at the input of the comparator. In the latch mode (logic high), the output will
reflect the input state just prior to the comparator’s being placed in the latch mode. LEA must be driven
in conjunction with LEA.
8
VEE
Negative Supply Terminal
9
INA
Inverting analog input of the differential input stage for Channel A. The inverting A input must be driven
in conjunction with the noninverting A input.
10
+INA
Noninverting analog input of the differential input stage for Channel A. The noninverting A input must
be driven in conjunction with the inverting A input.
11
NC
No Connect. Leave pin unconnected.
12
+INB
Noninverting analog input of the differential input stage for Channel B. The noninverting B input must
be driven in conjunction with the inverting B input.
13
INB
Inverting analog input of the differential input stage for Channel B. The inverting B input must be driven
in conjunction with the noninverting B input.
14
VCC
Positive Supply Terminal
15
LEB
One of two complementary inputs for Channel B Latch Enable. In the compare mode (logic low), the
output will track changes at the input of the comparator. In the latch mode (logic high), the output will
reflect the input state just prior to the comparator’s being placed in the latch mode. LEB must be driven
in conjunction with LEB.
16
NC
No Connect. Leave pin unconnected or attach to GND (internally connected to GND).
17
LEB
One of two complementary inputs for Channel B Latch Enable. In the compare mode (logic high), the
output will track changes at the input of the comparator. In the latch mode (logic low), the output will
reflect the input state just prior to the comparator’s being placed in the latch mode. LEB must be driven
in conjunction with LEB.
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| ADCMP565BPZ | 功能描述:IC COMP DUAL ULTRA-FAST 20-PLCC RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，開路集電極，TTL 電壓 - 電源，單路/雙路(±):2.7 V ~ 5.5 V 電壓 - 輸入偏移（最小值）:7mV @ 5V 電流 - 輸入偏壓（最小值）:0.25µA @ 5V 電流 - 輸出（標(biāo)準(zhǔn)）:84mA @ 5V 電流 - 靜態(tài)（最大值）:120µA CMRR, PSRR（標(biāo)準(zhǔn)）:- 傳輸延遲（最大）:600ns 磁滯:- 工作溫度:-40°C ~ 85°C 封裝/外殼:SC-74A，SOT-753 安裝類型:表面貼裝 包裝:剪切帶 (CT) 產(chǎn)品目錄頁面:1268 (CN2011-ZH PDF) 其它名稱:*LMV331M5*LMV331M5/NOPBLMV331M5CT |
| ADCMP566 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual Ultrafast Voltage Comparator |
| ADCMP566BCP | 制造商:Analog Devices 功能描述:Comparator Dual -5.45V/5.25V 32-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:HIGH SPEED COMPARATOR - Bulk 制造商:Analog Devices 功能描述:IC SEMICONDUCTOR ((NS)) |
| ADCMP566BCPZ | 功能描述:IC COMP DUAL ULTRA-FAST 32LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，開路集電極，TTL 電壓 - 電源，單路/雙路(±):2.7 V ~ 5.5 V 電壓 - 輸入偏移（最小值）:7mV @ 5V 電流 - 輸入偏壓（最小值）:0.25µA @ 5V 電流 - 輸出（標(biāo)準(zhǔn)）:84mA @ 5V 電流 - 靜態(tài)（最大值）:120µA CMRR, PSRR（標(biāo)準(zhǔn)）:- 傳輸延遲（最大）:600ns 磁滯:- 工作溫度:-40°C ~ 85°C 封裝/外殼:SC-74A，SOT-753 安裝類型:表面貼裝 包裝:剪切帶 (CT) 產(chǎn)品目錄頁面:1268 (CN2011-ZH PDF) 其它名稱:*LMV331M5*LMV331M5/NOPBLMV331M5CT |
| ADCMP567 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual Ultrafast Voltage Comparator |
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