參數(shù)資料
型號(hào): ADC1613S080HN
廠商: NXP Semiconductors N.V.
元件分類: 外設(shè)及接口
英文描述: Single 16 bits ADC; 80 Msps; serial JESD204A
封裝: ADC1613S080HN/C1<SOT1152-1 (HVQFN32R)|<<http://www.nxp.com/packages/SOT1152-1.html<1<Always Pb-free,;ADC1613S080HN/C1<SOT1152-1 (HVQFN32R)|<<http://www.nxp.com/packages/S
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代理商: ADC1613S080HN
ADC1613S_SER
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 9 June 2011
28 of 39
NXP Semiconductors
ADC1613S series
Single 16-bit ADC; serial JESD204A interface
Table 21.
Default values are highlighted.
Bit
Symbol
7 to 4
-
3
INTREF_EN
Register Vref (address 0008h)
Access
-
R/W
Value
0000
Description
not used
enable internal programmable VREF mode:
disable
enable
programmable internal reference:
0 dB (FS = 2 V)
1 dB (FS = 1.78 V)
2 dB (FS = 1.59 V)
3 dB (FS = 1.42 V)
4 dB (FS = 1.26 V)
5 dB (FS = 1.12 V)
6 dB (FS = 1 V)
not used
0
1
2 to 0
INTREF[2:0]
R/W
000
001
010
011
100
101
110
111
Table 22.
Default values are highlighted.
Register offset
Decimal
+31
...
0
...
32
Digital offset adjustment (address 0013h)
DIG_OFFSET[5:0]
011111
...
000000
...
100000
+31 LSB
...
0
...
32 LSB
Table 23.
Default values are highlighted.
Bit
Symbol
7 to 3
-
2 to 0
TESTPAT_1[2:0]
Register Test pattern 1 (address 0014h)
Access
-
R/W
Value
00000
Description
not used
digital test pattern:
off
mid-scale
FS
+ FS
toggle ‘1111..1111’/’0000..0000’
custom test pattern, to be written in register 0015h and 0016h
‘010101...’
‘101010...’
000
001
010
011
100
101
110
111
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