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參數(shù)資料
| 型號： | ADC1613D105HN |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | ADC1613D105 - Dual 16 bits ADC; 105 Msps; serial JESD204A |
| 封裝： | ADC1613D105HN/C1<SOT684-7 (HVQFN56)|<<http://www.nxp.com/packages/SOT684-7.html<1<Always Pb-free,;ADC1613D105HN/C1<SOT684-7 (HVQFN56)|<<http://www.nxp.com/packages/SOT684 |
| 文件頁數(shù)： | 14/43頁 |
| 文件大?。?/td> | 611K |
| 代理商： | ADC1613D105HN |
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ADC1613D_SER
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 9 February 2011
14 of 43
NXP Semiconductors
ADC1613D series
Dual 16-bit ADC: serial JESD204A interface
11. Application information
11.1 Analog inputs
11.1.1
Input stage description
The analog input of the ADC1613D supports a differential or a single-ended input drive.
Optimal performance is achieved using differential inputs with the common-mode input
voltage (V
I(cm)
) on pins INP and INM set to 0.5V
DDA
.
The full-scale analog input voltage range is configurable between 1 V (p-p) and 2 V (p-p)
via a programmable internal reference (see
Section 11.2
and
Table 21
).
Figure 6
shows the equivalent circuit of the sample-and-hold input stage, including
ElectroStatic Discharge (ESD) protection and circuit and package parasitics.
The sample phase occurs when the internal clock (derived from the clock signal on pin
CLKP/CLKM) is HIGH. The voltage is then held on the sampling capacitors. When the
clock signal goes LOW, the stage enters the hold phase and the voltage information is
transmitted to the ADC core.
11.1.2
Anti-kickback circuitry
Anti-kickback circuitry (
Figure 7
) is needed to counteract the effects of a charge injection
generated by the sampling capacitance.
The RC filter is also used to filter noise from the signal before it reaches the sampling
stage. The value of the capacitor should be chosen to maximize noise attenuation without
degrading the settling time excessively.
Fig 6.
Input sampling circuit
005aaa069
INAP
INBP
package
ESD
parasitics
switch
Ron = 15
Ω
4 pF
4 pF
Cs
Cs
switch
Ron = 15
Ω
INAM
INBM
1, 14
2, 13
internal
clock
internal
clock
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADC1613D105HN/C1,5 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC DUAL 16b ADC 105MSPS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC1613D105HN/C1+551 | 制造商:NXP Semiconductors 功能描述:Tray |
| ADC1613D105HN-C1 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC1613D105HN-C18 | 制造商:Integrated Device Technology Inc 功能描述:HVQFN56 - Tape and Reel |
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