參數(shù)資料
型號: ADC1610S065HN
廠商: NXP Semiconductors N.V.
元件分類: 外設(shè)及接口
英文描述: Single 16-bit ADC 65 Msps CMOS or LVDS DDR digital outputs
封裝: ADC1610S065HN/C1<SOT618-1 (HVQFN40)|<<http://www.nxp.com/packages/SOT618-1.html<1<Always Pb-free,;ADC1610S065HN/C1<SOT618-1 (HVQFN40)|<<http://www.nxp.com/packages/SOT618
文件頁數(shù): 17/40頁
文件大?。?/td> 299K
代理商: ADC1610S065HN
ADC1610S_SER
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 25 January 2011
17 of 40
NXP Semiconductors
ADC1610S series
Single 16-bit ADC; CMOS or LVDS DDR digital output
11.1.4
Selecting the output data format
The output data format can be selected via the SPI interface (offset binary, two’s
complement or gray code; see
Table 23
) or using pin DFS in Pin control mode (offset
binary or two’s complement). Offset binary is selected when DFS is LOW. When DFS is
HIGH, two’s complement is selected.
11.2 Analog inputs
11.2.1
Input stage
The analog input of the ADC1610S supports a differential or a single-ended input drive.
Optimal performance is achieved using differential inputs with the common-mode input
voltage (V
I(cm)
) on pins INP and INM set to 0.5V
DDA
.
The full-scale analog input voltage range is configurable between 1 V (p-p) and 2 V (p-p)
via a programmable internal reference (see
Section 11.3
and
Table 22
).
The equivalent circuit of the sample and hold input stage, including Electrostatic
Discharge (ESD) protection and circuit and package parasitics, is shown in
Figure 16
.
The sample phase occurs when the internal clock (derived from the clock signal on pin
CLKP/CLKM) is HIGH. The voltage is then held on the sampling capacitors. When the
clock signal goes LOW, the stage enters the hold phase and the voltage information is
transmitted to the ADC core.
Fig 16. Input sampling circuit
005aaa043
INP
Package
ESD
Parasitics
Switch
Ron = 15
Ω
4 pF
4 pF
Sampling
capacitor
Sampling
capacitor
Switch
Ron = 15
Ω
INM
8
7
Internal
clock
Internal
clock
相關(guān)PDF資料
PDF描述
ADC1610S065HN Single 16-bit ADC 65 Msps CMOS or LVDS DDR digital outputs
ADC1610S080HN Single 16-bit ADC 80 Msps CMOS or LVDS DDR digital outputs
ADC1610S105HN Single 16-bit ADC 105 Msps CMOS or LVDS DDR digital outputs
ADC1610S125HN Single 16-bit ADC 125 Msps CMOS or LVDS DDR digital outputs
ADC1613D065HN ADC1613D065 - Dual 16 bits ADC; 65 Msps; serial JESD204A
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADC1610S065HN/C1,5 功能描述:模數(shù)轉(zhuǎn)換器 - ADC SNGLE 16b ADC 65MSPS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADC1610S065HN/C1;5 功能描述:模數(shù)轉(zhuǎn)換器 - ADC SGL 16b ADC 65 MSPS CMOS OR LVDS DDR RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADC1610S080F1/DB,598 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 ADC DEMO BOARD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
ADC1610S080F2/DB,598 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 ADC DEMO BOARD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
ADC1610S080HN/C1,5 功能描述:模數(shù)轉(zhuǎn)換器 - ADC SNGLE 16b ADC 80MSPS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32