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| 型號： | ADC1002S020HL |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 外設及接口 |
| 英文描述： | Single 10 bits ADC, up to 20 MHz |
| 封裝： | ADC1002S020HL/C1<SOT401-1 (LQFP32)|<<http://www.nxp.com/packages/SOT401-1.html<1<Always Pb-free,;ADC1002S020HL/C1<SOT401-1 (LQFP32)|<<http://www.nxp.com/packages/SOT401-1 |
| 文件頁數(shù)： | 8/19頁 |
| 文件大?。?/td> | 119K |
| 代理商： | ADC1002S020HL |
ADC1002S020_2
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 13 August 2008
8 of 19
NXP Semiconductors
ADC1002S020
Single 10 bits ADC, up to 20 MHz
[1]
In addition to a good layout of the digital and analog ground, it is recommended that the rise and fall times of the clock must not be less
than 1 ns.
[2]
Analog input voltages producing code 0 up to and including code 1023:
a) V
offset
BOTTOM is the difference between the analog input which produces data equal to 00 and the reference voltage on pin RB
(V
RB
) at T
amb
= 25
°
C.
b) V
offset
TOP is the difference between the reference voltage on pin RT (V
RT
) and the analog input which produces data outputs equal
to code 1023 at T
amb
= 25
°
C
.
To ensure the optimum linearity performance of such a converter architecture the lower and upper extremities of the converter reference
resistor ladder are connected to pins RB and RT via offset resistors R
OB
and R
OT
as shown in
Figure 3
.
V
V
–
OB
L
OT
[3]
a) The current flowing into the resistor ladder is
and the full-scale input range at the converter, to cover code 0
to 1023 is
b) Since R
L
, R
OB
and R
OT
have similar behavior with respect to process and temperature variation, the ratio
will be kept reasonably constant from device to device. Consequently variation of the output codes at a given input voltage depends
mainly on the difference V
RT
V
RB
and its variation with temperature and supply voltage. When several ADCs are connected in
parallel and fed with the same reference source, the matching between each of them is optimized.
[4]
The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale input (square
wave signal) in order to sample the signal and obtain correct output data.
[5]
Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8000 acquisition points per equivalent fundamental
period. The calculation takes into account all harmonics and noise up to half the clock frequency (Nyquist frequency). Conversion to
SIgnal-to-Noise And Distortion (SINAD) ratio: SINAD = ENOB
×
6.02 + 1.76 dB.
[6]
Output data acquisition: the output data is available after the maximum delay time of t
d(o)
.
Timing (f
clk
= 20 MHz; C
L
= 20 pF); see
Figure 4
[6]
t
d(s)
sampling delay time
t
h(o)
output hold time
t
d(o)
output delay time
-
5
8
8
-
-
12
17
5
-
15
20
ns
ns
ns
ns
V
DDO
= 4.75 V
V
DDO
= 3.15 V
3-state output delay times; see
Figure 5
t
dZH
float to active HIGH
delay time
t
dZL
float to active LOW delay
time
t
dHZ
active HIGH to float
delay time
t
dLZ
active LOW to float delay
time
Standby mode output delay times
t
TLH
LOW to HIGH transition
time
t
THL
HIGH to LOW transition
time
-
14
18
ns
-
16
20
ns
-
16
20
ns
-
14
18
ns
stand-by
-
-
200
ns
start-up
-
-
500
ns
Table 6.
V
DDA
= V7 to V9 = 3.3 V; V
DDD
= V4 to V3 = V18 to V19 = 3.3 V; V
DDO
= V20 to V21 = 3.3 V; V
SSA
, V
SSD
and V
SSO
shorted
together; V
i(p-p)
= 1.83 V; C
L
= 20 pF; T
amb
= 0
°
C to 70
°
C; typical values measured at T
amb
= 25
°
C unless otherwise
specified.
Symbol
Parameter
Conditions
Characteristics
…continued
Min
Typ
Max
Unit
I
----------------------------------------
=
V
I
R
L
I
L
×
R
L
OB
OT
----------------------------------------
V
RT
V
RB
+
(
)
×
0.871
V
RT
V
RB
–
(
)
×
=
=
=
R
L
OB
OT
----------------------------------------
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADC1002S020HL/C1,1 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC SGL 10BIT ADC 20MSPS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC1002S020HL/C1,118 | 制造商:NXP Semiconductors 功能描述: |
| ADC1002S020HL/C1,151 | 制造商:NXP Semiconductors 功能描述: |
| ADC1002S020HL/C1-T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC SGL 10BIT ADC 20MSPS ULTRA LO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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