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參數(shù)資料
| 型號： | ADC0838CCN |
| 元件分類： | 串行ADC |
| 英文描述： | Serial I/O 8-Bit A/D Converters with Multiplexer Options |
| 中文描述： | 串行I / O 8位A / D轉(zhuǎn)換器與多路復(fù)用器選項(xiàng) |
| 文件頁數(shù)： | 6/26頁 |
| 文件大?。?/td> | 410K |
| 代理商： | ADC0838CCN |
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ML2281, ML2282, ML2284, ML2288
6
ELECTRICAL CHARACTERISTICS
(Continued)
TYP
NOTE 3
LIMIT
UNITS
SYMBOL
PARAMETER
CONDITIONS
MIN
MAX
AC ELECTRICAL CHARACTERISTICS
f
CLK
Clock Frequency
(Note 4)
10
1.333
kHz
t
ACQ
Sample-and-Hold Acquisition
1/2
1/f
CLK
t
C
Conversion Time
Not including MUX adddressing time
8
1/f
CLK
SNR
Signal to Noise Ratio
ML2281
V
IN
= 40kHz, 5V sine. f
CLK
= 1.333MHz
(f
SAMPLING
120kHz). Noise is sum of all
nonfundamental components up to 1/2
of f
SAMPLING
(Note 11)
47
dB
THD
Total Harmonic Distortion
ML2281
V
IN
= 40kHz, 5V sine. f
CLK
= 1.333MHz
(f
SAMPLING
120kHz). THD is sum of 2,
3, 4, 5 harmonics relative to fundamental
(Note 11)
–60
dB
IMD
Intermodulation Distortion
ML2281
V
IN
= f
A
+ f
B
. f
A
= 40kHz, 2.5V sine.
f
B
= 39.8kHz, 2.5V Sine, f
CLK
= 1.333MHz
(f
SAMPLING
120kHz). IMD is (f
A
+ f
B
),
(f
A
– f
B
), (2f
A
+ f
B
), (2f
A
– f
B
), (f
A
+ 2f
B
),
(f
A
– 2f
B
) relative to fundamental (Note 11)
–60
dB
Clock Duty Cycle
(Notes 4, 10)
40
60
%
t
SET-UP
CS
Falling Edge or Data Input
Valid to CLK Rising Edge
(Note 4)
130
ns
t
HOLD
Data Input Valid after
CLK Rising Edge
(Note 4)
80
ns
t
PD1
,
t
PD0
CLK Falling Edge to Output
Data Valid
C
L
= 100pF (Note 4 & 12)
Data MSB first
Data LSB first
90
50
200
110
ns
ns
t
1H
,
t
0H
Rising Edge of
CS
to Data
Output and SARS Hi-Z
C
L
= 10pF, R
L
= 10k (see high impedance
test circuits) (Note 5)
40
90
ns
C
L
= 100pF, R
L
= 2k (Note 4)
80
160
ns
C
IN
Capacitance of Logic Input
5
pF
C
OUT
Capacitance of Logic Outputs
5
pF
Note 1:
When the input voltage (V
IN
) at any pin exceeds the power supply rails (V
IN
< GND or V
IN
> V
CC
) the absolute value of current at that pin should be limited to 25mA
or less.
0°C to 70°C and –40°C to +85°C operating temperature range devices are 100% tested with temperature limits guaranteed by 100% testing, sampling, or by
correlation with worst-case test conditions.
Typicals are parametric norm at 25°C.
Parameter guaranteed and 100% production tested.
Parameter guaranteed. Parameters not 100% tested are not in outgoing quality level calculation.
Total unadjusted error includes offset, full-scale, linearity, multiplexer and sample-and-hold errors.
Cannot be tested for ML2282.
For V
IN
–
3
V
IN
+ the digital output code will be 0000 0000. Two on-chip diodes are tied to each analog input (see Block Diagram) which will forward conduct for
analog input voltages one diode drop below ground or one diode drop greater than the V
CC
supply. Be careful, during testing at low V
CC
levels (4.5V), as high level
analog inputs (5V) can cause this input diode to conduct—especially at elevated temperatures, and cause errors for analog inputs near full-scale. The spec allows
50mV forward bias of either diode. This means that as long as the analog V
IN
or V
REF
does not exceed the supply voltage by more than 50mV, the output code will be
correct. To achieve an absolute 0V to 5V input voltage range will therefore require a minimum supply voltage of 4.950V
DC
over temperature variations, initial
tolerance and loading.
Leakage current is measured with the clock not switching.
Note 10: A 40% to 60% clock duty cycle range insures proper operation at all clock frequencies. In the case that an available clock has a duty cycle outside of these limits, the
minimum time the clock is high or the minimum time the clock is low must be at least 300ns. The maximum time the clock can be high or low is 60μs.
Note 11: Because of multiplexer addressing, test conditions for the ML2282 would be V
IN
= 34kHz, 5V sine (f
SAMPLING
102kHz); ML2284 V
IN
= 32kHz, 5V sine
(f
SAMPLING
95kHz); ML2288 V
IN
= 30kHz, 5V sine (f
SAMPLING
89kHz).
Note 12: Since data, MSB first, is the output of the comparator used in the successive approximation loop, an additional delay is built in (see Block Diagram) to allow for
comparator response time.
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD-C0838CCN | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Bit Serial I/O A/D Converters with Multiplexer Options |
| ADC0838CCN | 制造商:Texas Instruments 功能描述:IC 8BIT ADC SERIAL DIP20 838 |
| ADC0838CCN/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 8-Bit |
| ADC0838CCN/B+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 8-Bit |
| ADC0838CCN/NOPB | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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