參數(shù)資料
型號(hào): ADATE302-02BSVZ
廠商: Analog Devices Inc
文件頁數(shù): 1/58頁
文件大小: 0K
描述: IC DCL ATE 500MHZ DUAL 100TQFP
標(biāo)準(zhǔn)包裝: 1
類型: DCL
應(yīng)用: 自動(dòng)測試設(shè)備
安裝類型: 表面貼裝
封裝/外殼: 100-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 100-TQFP-EP(14x14)
包裝: 托盤
500 MHz Dual Integrated DCL with Differential
Drive/Receive, Level Setting DACs, and Per Pin PMU
ADATE302-02
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalog Devices foritsuse,nor for anyinfringements ofpatents orother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2008–2009 Analog Devices, Inc. All rights reserved.
FEATURES
Driver
3-level driver with high-Z mode and built-in clamps
Precision trimmed output resistance
Low leakage mode (typically <10 nA)
Voltage range: 2.0 V to +6.0 V
1.0 ns minimum pulse width, 1 V terminated
Comparator
Window and differential comparator
>1 GHz input equivalent bandwidth
Load
±12 mA maximum current capability
Per pin PMU
Force voltage range: 2.0 V to +6.0 V
5 current ranges: 25 mA, 2 mA, 200 μA, 20 μA, and 2 μA
Levels
14-bit DAC for DCL levels
Typically <±5 mV INL (calibrated)
16-bit DAC for PMU levels
Typically <±1.5 mV INL (calibrated) linearity in FV mode
HVOUT output buffer
0 V to 13.5 V output range
Packages
84-ball, 9 mm × 9 mm, flip-chip BGA
100-lead TQFP_EP
1.7 W per channel with no load
APPLICATIONS
Automatic test equipment
Semiconductor test systems
Board test systems
Instrumentation and characterization equipment
GENERAL DESCRIPTION
The ADATE302-02 is a complete, single-chip solution that
performs the pin electronic functions of the driver, the compa-
rator, and the active load (DCL), per pin PMU, and dc levels for
ATE applications. The device also contains an HVOUT driver
with a VHH buffer capable of generating up to 13.5 V.
The driver features three active states: data high mode, data low
mode, and term mode, as well as an inhibit state. The inhibit
state, in conjunction with the integrated dynamic clamp, facilitates
the implementation of a high speed active termination. The output
voltage range is 2.0 V to +6.0 V to accommodate a wide
variety of test devices.
The ADATE302-02 can be used as either a dual single-ended
drive/receive channel or a single differential drive/receive
channel. Each channel of the ADATE302-02 features a high
speed window comparator for functional testing as well as a per
pin PMU with FV or FI and MV or MI functions. All necessary
dc levels for DCL functions are generated by on-chip 14-bit
DACs. The per pin PMU features an on-chip 16-bit DAC for
high accuracy and contains integrated range resistors to
minimize external component counts.
The ADATE302-02 uses a serial bus to program all functional
blocks and has an on-board temperature sensor for monitoring
the device temperature.
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