參數(shù)資料
型號(hào)： ADA4941-1YR-EBZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 22/24頁(yè)
文件大小： 0K
描述： BOARD EVAL FOR ADA4941-1YR
標(biāo)準(zhǔn)包裝： 1
每 IC 通道數(shù)： 1 - 單
放大器類型： 差分
板類型： 裸（未填充）
已供物品： 板
已用 IC / 零件： 8-SOIC 封裝
ADA4939-1/ADA4939-2
Rev. 0 | Page 7 of 24
ABSOLUTE MAXIMUM RATINGS
Table 7.
Parameter
Rating
Supply Voltage
5.5 V
Power Dissipation
Input Current, +IN, IN, PD
±5 mA
Storage Temperature Range
65°C to +125°C
Operating Temperature Range
ADA4939-1
40°C to +105°C
ADA4939-2
40°C to +105°C
Lead Temperature (Soldering, 10 sec)
300°C
Junction Temperature
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational section of
this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device
reliability.
THERMAL RESISTANCE
θJA is specified for the device (including exposed pad) soldered
to a high thermal conductivity 2s2p circuit board, as described
in EIA/JESD 51-7.
Table 8. Thermal Resistance
Package Type
θJA
Unit
ADA4939-1, 16-Lead LFCSP (Exposed Pad)
98
°C/W
ADA4939-2, 24-Lead LFCSP (Exposed Pad)
67
°C/W
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the ADA4939 package
is limited by the associated rise in junction temperature (TJ) on
the die. At approximately 150°C, which is the glass transition
temperature, the plastic changes its properties. Even temporarily
exceeding this temperature limit can change the stresses that the
package exerts on the die, permanently shifting the parametric
performance of the ADA4939. Exceeding a junction temperature
of 150°C for an extended period can result in changes in the
silicon devices, potentially causing failure.
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive. The quiescent power is the voltage
between the supply pins (VS) times the quiescent current (IS).
The power dissipated due to the load drive depends upon the
particular application. The power due to load drive is calculated
by multiplying the load current by the associated voltage drop
across the device. RMS voltages and currents must be used in
these calculations.
Airflow increases heat dissipation, effectively reducing θJA. In
addition, more metal directly in contact with the package leads/
exposed pad from metal traces, through holes, ground, and power
planes reduces θJA.
Figure 4 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the single 16-lead
LFCSP (98°C/W) and the dual 24-lead LFCSP (67°C/W) on a
JEDEC standard four-layer board with the exposed pad
soldered to a PCB pad that is connected to a solid plane.
3.0
2.5
2.0
1.5
1.0
0.5
0
–40
100
80
60
40
20
0
–20
M
A
XI
M
U
M
PO
W
ER
D
ISSI
PA
T
IO
N
(
W
)
AMBIENT TEMPERATURE (°C)
07
42
9-
0
04
ADA4939-1
ADA4939-2
Figure 4. Maximum Power Dissipation vs. Ambient Temperature for
a Four-Layer Board
ESD CAUTION
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