
Data Sheet
ADA4940-1/ADA4940-2
Rev. C | Page 27 of 32
DRIVING A HIGH PRECISION ADC
dc-coupled applications. The circuit in
Figure 73 shows a front-
an 18-bit, 1 MSPS successive approximation, analog-to-digital
converter (ADC) that operates from a single power supply, 3 V
to 5 V. It contains a low power, high speed, 18-bit sampling
ADC and a versatile serial interface port. The reference voltage,
REF, is applied externally and can be set independent of the
coupled on the input and the output, which eliminates the need
for a transformer to drive the ADC. The amplifier performs a
single-ended-to-differential conversion if needed and level
shifts the input signal to match the input common mode of the
ADC. The
ADA4940-1 is configured with a dual 7 V supply
(+6 V and 1 V) and a gain that is set by the ratio of the
feedback resistor to the gain resistor. In addition, the circuit
can be used in a single-ended-input-to-differential output or
differential-input-to-differential output configuration. If needed,
a termination resistor in parallel with the source input can be
used. Whether the input is a single-ended input or differential,
the input impedance of the amplifier can be calculated as shown in
R4 = 1 kΩ, the single-ended input impedance is approximately
1.33 kΩ, which, in parallel with a 52.3 Ω termination resistor,
provides a 50 Ω termination for the source. An additional 25.5 Ω
(1025.5 Ω total) at the inverting input balances the parallel
impedance of the 50 Ω source and the termination resistor driving
the noninverting input. However, if a differential source input is
used, the differential input impedance is 2 kΩ. In this case, two
52.3 Ω termination resistors are used to terminate the inputs.
In this example, the signal generator has a 10 V p-p symmetric,
ground-referenced bipolar output. The VOCM input is bypassed for
noise reduction and set externally with 1% resistors to 2.5 V to
maximize the output dynamic range. With an output common-
0 V and 5 V, opposite in phase, providing a gain of 1 and a
10 V p-p differential signal to the ADC input. The differential RC
single-pole, low-pass filtering with a corner frequency of 1.79 MHz
and extra buffering for the current spikes that are output from the
ADC input when its sample-and-hold (SHA) capacitors are
discharged.
portion of that power is the current coming from supplies to the
output, which is set at 2.5 V, going back to the input through the
feedback and gain resistors. To reduce that power to 25 mW,
increase the value of the feedback and gain resistor from 1 kΩ
to 2 kΩ and set the value of the resistors R5 and R6 to 3 kΩ. The
ADR435 is used to regulate the +6 V supply to +5 V, which ends
up powering the ADC and setting the reference voltage for the
VOCM pin.
Figure 72 shows the fft of a 20 kHz differential input tone
sampled at 1 MSPS. The second and third harmonics are down
at 118 dBc and 122 dBc.
0
–160
–140
–120
–100
–80
–60
–40
–20
0
20k
40k
60k
80k
100k
AM
P
L
IT
UDE
(
d
B)
FREQUENCY (Hz)
0
845
2-
0
69
Figure 72. Distortion Measurement of a 20 kHz Input Tone
(CN-0237)0
845
2-
06
6
33
10F
R1
–DIN
+2.5V
+5V
+6V
–1V
R2
R4
+6V
REF
VDD
GND
IN+
IN–
AD7982
2.7nF
–IN
+OUT
–OUT
+IN
R3
+DIN
ADR435
0.1F
R6
R5
SERIAL
INTERFACE
–FB
+FB
ADA4940-1
VOCM