參數(shù)資料
型號: ADA4938-1ACPZ-RL
廠商: ANALOG DEVICES INC
元件分類: 通用總線功能
英文描述: Ultra-Low Distortion Differential ADC Driver
中文描述: LINE DRIVER, QCC16
封裝: 3 X 3 MM, ROHS COMPLIANT, MO-220VEED-2, LFCSP-16
文件頁數(shù): 13/14頁
文件大?。?/td> 307K
代理商: ADA4938-1ACPZ-RL
Preliminary Technical Data
ADA4938-1
LAYOUT, GROUNDING, AND BYPASSING
As a high speed device, the ADA4938-1 is sensitive to the
PCB environment in which it operates. Realizing its superior
performance requires attention to the details of high speed
PCB design.
The first requirement is a solid ground plane that covers as
much of the board area around the ADA4938-1 as possible.
However, the area near the feedback resistors (R
F
), gain resistors
(R
G
), and the input summing nodes (Pin 2 and Pin 3) should be
cleared of all ground and power planes (see Figure 8). This
minimizes any stray capacitance at these nodes and prevents
peaking of the response of the amplifier at high frequencies.
Rev. PrD | Page 13 of 14
0
Figure 8. Ground and Power Plane Voiding in Vicinity of R
F
and R
G
The power supply pins should be bypassed as close to the device
as possible and directly to a nearby ground plane. High frequency
ceramic chip capacitors should be used. It is recommended that
two parallel bypass capacitors (1000 pF and 0.1 μF) be used for
each supply. The 1000 pF capacitor should be placed closer to
the device. Further away, low frequency bypassing should be
provided, using 10 μF tantalum capacitors from each supply
to ground.
Signal routing should be short and direct to avoid parasitic
effects. Wherever complementary signals exist, a symmetrical
layout should be provided to maximize balanced performance.
When routing differential signals over a long distance, PCB
traces should be close together, and any differential wiring
should be twisted such that loop area is minimized. This
reduces radiated energy and makes the circuit less susceptible
to interference.
相關(guān)PDF資料
PDF描述
ADA4938-1 Ultra-Low Distortion Differential ADC Driver
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