參數(shù)資料
型號: ADA4899-1YRDZ-RL
廠商: Analog Devices Inc
文件頁數(shù): 6/21頁
文件大?。?/td> 0K
描述: IC OPAMP VF ULN ULDIST 8SOIC
產(chǎn)品培訓(xùn)模塊: Practical Guide High Speed PCB Layout
設(shè)計資源: High Speed, Precision, Differential AC-Coupled Drive Circuit for AD7625 (CN0080)
標準包裝: 2,500
放大器類型: 電壓反饋
電路數(shù): 1
轉(zhuǎn)換速率: 310 V/µs
-3db帶寬: 600MHz
電流 - 輸入偏壓: 6µA
電壓 - 輸入偏移: 35µV
電流 - 電源: 14.7mA
電流 - 輸出 / 通道: 200mA
電壓 - 電源,單路/雙路(±): 4.5 V ~ 12 V,±2.25 V ~ 6 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm Width)裸露焊盤
供應(yīng)商設(shè)備封裝: 8-SOIC-EP
包裝: 帶卷 (TR)
ADA4899-1
Rev. B | Page 13 of 20
THEORY OF OPERATION
The ADA4899-1 is a voltage feedback op amp that combines
unity-gain stability with a 1 nV/√Hz input noise. It employs a
highly linear input stage that can maintain greater than 80 dBc
(@ 2 V p-p) distortion out to 10 MHz while in a unity-gain
configuration. This rare combination of low gain stability,
input-referred noise, and extremely low distortion is the result
of Analog Devices proprietary op amp architecture and high
speed complementary bipolar processing technology.
The simplified ADA4899-1 topology, shown in Figure 45, is a
single gain stage with a unity-gain output buffer. It has over
80 dB of open-loop gain and maintains precision specifications
such as CMRR, PSRR, and offset to levels that are normally
associated with topologies having two or more gain stages.
BUFFER
gm
CC
R1
RL
VOUT
0
5
72
0
-06
0
Figure 45. ADA4899-1 Topology
A pair of internally connected diodes limits the differential
voltage between the noninverting input and the inverting input
of the ADA4899-1. Each set of diodes has two series diodes
connected in antiparallel, which limits the differential voltage
between the inputs to approximately ±1.2 V. All of the ADA4899-1
pins are ESD protected with voltage-limiting diodes connected
between both rails. The protection diodes can handle 10 mA.
Currents should be limited through these diodes to 10 mA or less
by using a series limiting resistor.
PACKAGING INNOVATION
The ADA4899-1 is available in both a SOIC and an LFCSP, each
of which has a thermal pad that allows the device to run cooler,
thereby increasing reliability. To help avoid routing around the
pad when laying out the board, both packages have a dedicated
feedback pin on the opposite side of the package for ease in
connecting the feedback network to the inverting input. The
secondary output pin also isolates the interaction of any
capacitive load on the output and the self-inductance of the
package and bond wire from the feedback loop. When using the
dedicated feedback pin, inductance in the primary output helps to
isolate capacitive loads from the output impedance of the
amplifier.
Both the SOIC and LFCSP have modified pinouts to improve
heavy load second harmonic distortion performance. The intent
of both is to isolate the negative supply pin from the noninverting
input. The LFCSP accomplishes this by rotating the standard
8-lead package pinout counterclockwise by one pin, which puts
the supply and output pins on the right side of the package and
the input pins on the left side of the package. The SOIC is
slightly different with the intent of both isolating the inputs
from the supply pins and giving the user the option of using the
ADA4899-1 in a standard SOIC board layout with little or no
modification. Taking the unused Pin 5 and making it a second
negative supply pin allows for both an input isolated layout and
a traditional layout to be supported.
DISABLE PIN
A three-state input pin is provided on the ADA4899-1 for a
high impedance disable and an optional input bias current
cancellation circuit. The high impedance output allows several
ADA4899-1s to drive the same ADC or output line time
interleaved. Pulling the DISABLE pin low activates the high
impedance state (see Table 7 for threshold levels). When the
DISABLE pin is left floating (open), the ADA4899-1 operates
normally. With the DISABLE pin pulled within 0.7 V of the
positive supply, an optional input bias current cancellation
circuit is turned on, which lowers the input bias current to less
than 200 nA. In this mode, the user can drive the ADA4899-1
from a high dc source impedance and still maintain minimal
output-referred offset without having to use impedance
matching techniques. In addition, the ADA4899-1 can be
ac-coupled while setting the bias point on the input with a high
dc impedance network. The input bias current cancellation
circuit doubles the input-referred current noise, but this effect is
minimal as long as the wideband impedances are kept low (see
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