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參數(shù)資料
| 型號(hào)： | ADA4899-1YRDZ-RL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | Unity Gain Stable, Ultralow Distortion, 1 nV/ Hz Voltage Noise, High Speed Op Amp |
| 中文描述： | OP-AMP, 230 uV OFFSET-MAX, PDSO8 |
| 封裝： | ROHS COMPLIANT, MS-012AA, SOIC-8 |
| 文件頁(yè)數(shù)： | 16/20頁(yè) |
| 文件大小： | 496K |
| 代理商： | ADA4899-1YRDZ-RL |
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ADA4899-1
DISABLE PIN OPERATION
Rev. A | Page 16 of 20
The ADA4899-1 DISABLE pin performs three functions:
enable, disable, and reduction of the input bias current. When
the DISABLE pin is brought to within 0.7 V of the positive
supply, the input bias current circuit is enabled. This reduces
the input bias current by a factor of 100. In this state, the input
current noise doubles from 2.6 pA to 5.2 pA/
√
Hz. Table 7
outlines the DISABLE pin operation.
Table 7. DISABLE Pin Truth Table
Supply Voltage
Disable
Enable
Low Input Bias Current
ADA4899-1 MUX
With a true output disable, the ADA4899-1 can be used in
multiplexer applications. The outputs of two ADA4899-1s are
wired together to form a 2:1 mux. Figure 51 shows the 2:1 mux
schematic.
±5 V
5 to +2.4
Open
4.3 to 5
+5 V
0 to 2.4
Open
4.3 to 5
0
0V 1MHz
+5V
–5V
+5V
–5V
0.1μF
0.1μF
ADA4899-1
2V p-p
+5V
–5V
0.1μF
0.1μF
ADA4899-1
0.1μF
2.2μF
0.1μF
2.2μF
+
+
2k
1k
50
1.02k
50
V
REF
= 2.50V
2k
1V p-p
DISABLE
AD8137
DISABLE
50
R
T
50
V
OUT
Figure 51. ADA4899-1 2:1 Mux Schematic
An
AD8137
differential amplifier is used as a level translator
that converts the TTL input to a complementary ±3 V output to
drive the DISABLE pins of the ADA4899-1s. The transient
response for the 2:1 mux is shown in Figure 52.
0
2
1
CH1 = 500mV/DIV
CH2 = 5V/DIV
200ns/DIV
Figure 52. ADA4899-1 2:1 Mux Transient Response
CIRCUIT CONSIDERATIONS
Careful and deliberate attention to detail when laying out the
ADA4899-1 board yields optimal performance. Power supply
bypassing, parasitic capacitance, and component selection all
contribute to the overall performance of the amplifier.
PCB Layout
Because the ADA4899-1 can operate up to 600 MHz, it is
essential that RF board layout techniques be employed. All
ground and power planes under the pins of the ADA4899-1
should be cleared of copper to prevent the formation of
parasitic capacitance between the input pins to ground and the
output pins to ground. A single mounting pad on a SOIC
footprint can add as much as 0.2 pF of capacitance to ground if
the ground plane is not cleared from under the mounting pads.
The low distortion pinout of the ADA4899-1 reduces the
distance between the output and the inverting input of the
amplifier. This helps minimize the parasitic inductance and
capacitance of the feedback path, which reduces ringing and
second harmonic distortion.
Power Supply Bypassing
Power supply bypassing for the ADA4899-1 has been optimized
for frequency response and distortion performance. Figure 40
shows the recommended values and location of the bypass
capacitors. Power supply bypassing is critical for stability,
frequency response, distortion, and PSR performance. The
0.1 μF capacitors shown in Figure 40 should be as close to the
supply pins of the ADA4899-1 as possible. The electrolytic
capacitors should be directly adjacent to the 0.1 μF capacitors.
The capacitor between the two supplies helps improve PSR and
distortion performance. In some cases, additional paralleled
capacitors can help improve frequency and transient response.
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