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    參數(shù)資料
    型號: ADA4897-2ARMZ
    廠商: Analog Devices Inc
    文件頁數(shù): 10/29頁
    文件大?。?/td> 0K
    描述: IC OPAMP RR 230MHZ LP 10MSOP
    標準包裝: 50
    放大器類型: 電壓反饋
    電路數(shù): 2
    輸出類型: 滿擺幅
    轉(zhuǎn)換速率: 120 V/µs
    -3db帶寬: 230MHz
    電流 - 輸入偏壓: 11µA
    電壓 - 輸入偏移: 28µV
    電流 - 電源: 3mA
    電流 - 輸出 / 通道: 80mA
    電壓 - 電源,單路/雙路(±): 3 V ~ 10 V,±1.5 V ~ 5 V
    工作溫度: -40°C ~ 125°C
    安裝類型: 表面貼裝
    封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
    供應(yīng)商設(shè)備封裝: 10-MSOP
    包裝: 管件
    Data Sheet
    ADA4896-2/ADA4897-1/ADA4897-2
    Rev.
    | Page 17 of 28
    THEORY OF OPERATION
    AMPLIFIER DESCRIPTION
    The ADA4896-2/ADA4897-1/ADA4897-2 are 1 nV/√Hz input
    noise amplifiers that consume 3 mA from supplies ranging from
    3 V to 10 V. Fabricated on the Analog Devices SiGe bipolar process,
    the ADA4896-2/ADA4897-1/ADA4897-2 have a bandwidth in
    excess of 200 MHz. The amplifiers are unity-gain stable, and the
    input structure results in an extremely low input 1/f noise for a
    high speed amplifier.
    The rail-to-rail output stage is designed to drive the heavy feed-
    back load required to achieve an overall low output referred noise.
    To meet more demanding system requirements, the large signal
    bandwidth of the ADA4896-2/ADA4897-1/ADA4897-2 was
    increased beyond the typical fundamental limits of other low noise,
    unity-gain stable amplifiers. The maximum offset voltage of 500 μV
    and drift of 0.2 μV/°C make the ADA4896-2/ADA4897-1/
    ADA4897-2 excellent amplifier choices even when the low noise
    performance is not needed because there is minimal power
    penalty in achieving the low input noise or the high bandwidth.
    INPUT PROTECTION
    The ADA4896-2/ADA4897-1/ADA4897-2 are fully protected
    from ESD events, withstanding human body model ESD events
    of 2.5 kV and charged-device model events of 1 kV with no mea-
    sured performance degradation. The precision input is protected
    with an ESD network between the power supplies and diode
    clamps across the input device pair, as shown in Figure 44.
    +IN
    ESD
    –VS
    +VS
    BIAS
    TO THE REST OF THE AMPLIFIER
    –IN
    ESD
    09
    44
    7-
    06
    8
    Figure 44. Input Stage and Protection Diodes
    For differential voltages above approximately 0.7 V, the diode
    clamps begin to conduct. Too much current can cause damage
    due to excessive heating. If large differential voltages must be
    sustained across the input terminals, it is recommended that the
    current through the input clamps be limited to less than 10 mA.
    Series input resistors that are sized appropriately for the expected
    differential overvoltage provide the needed protection.
    The ESD clamps begin to conduct for input voltages that are
    more than 0.7 V above the positive supply and input voltages
    more than 0.7 V below the negative supply. If an overvoltage
    condition is expected, it is recommended that the input current
    be limited to less than 10 mA.
    DISABLE OPERATION
    Figure 45 shows the ADA4897-1/ADA4897-2 power-down
    circuitry. If the DISABLE pin is left unconnected, the base of
    the input PNP transistor is pulled high through the internal
    pull-up resistor to the positive supply and the part is turned
    on. Pulling the DISABLE pin to ≥2 V below the positive supply
    turns the part off, reducing the supply current to approximately
    18 μA for a 5 V voltage supply.
    +VS
    –VS
    DISABLE
    ESD
    IBIAS
    TO
    AMPLIFIER
    BIAS
    09
    44
    7-
    03
    7
    Figure 45. DISABLE Circuit
    The DISABLE pin is protected by ESD clamps, as shown in
    Figure 45. Voltages beyond the power supplies cause these
    diodes to conduct. For protection of the DISABLE pin, the
    voltage to this pin should not exceed 0.7 V above the positive
    supply or 0.7 V below the negative supply. If an overvoltage
    condition is expected, it is recommended that the input current
    be limited with a series resistor to less than 10 mA.
    When the amplifier is disabled, its output goes to a high
    impedance state. The output impedance decreases as frequency
    increases; this effect can be observed in Figure 36. In disable
    mode, a forward isolation of 50 dB can be achieved at 10 MHz.
    Figure 43 shows the forward isolation vs. frequency data.
    B
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