參數(shù)資料
型號(hào)： AD9991KCPRL
廠商： ANALOG DEVICES INC
元件分類： 消費(fèi)家電
英文描述： 10-Bit CCD Signal Processor with Precision Timing Generator
中文描述： SPECIALTY CONSUMER CIRCUIT, QCC56
封裝： 8 X 8 MM, MO-220-VLLD-2, LFCSP-56
文件頁數(shù)： 41/60頁
文件大?。?/td> 826K
代理商： AD9991KCPRL
AD9991
–41–
Table XIX. Timing Core Register Map
Address Content Value Register Name
30
[0] 0 CLIDIVIDE
31
[12:0] 01001 H1CONTROL
32
[12:0] 01001 H3CONTROL
33
[12:0] 00801 RGCONTROL
34
[1:0] 0 HBLKRETIME
35
[14:0] 1249 DRVCONTROL
36
[11:0] 00024 SAMPCONTROL
37
[8:0] 100 DOUTCONTROL
Data Bit Default
Register Description
Divide CLI Input Clock by 2. 1 = Divide by 2.
H1 Signal Control: Polarity [0](0 = Inversion, 1 = No Inversion).
H1 Positive Edge Location [6:1]. H1 Negative Edge Location [12:7].
H3 Signal Control: Polarity [0](0 = Inversion, 1 = No Inversion).
H3 Positive Edge Location [6:1]. H3 Negative Edge Location [12:7].
RG Signal Control: Polarity [0](0 = Inversion, 1 = No Inversion).
RG Positive Edge Location [6:1]. RG Negative Edge Location [12:7].
Retime HBLK to Internal H1/H3 Clocks. H1 Retime [0]. H3 Retime [1].
Preferred setting is 1 for each bit. Setting each bit to 1 will add one cycle delay
to HBLK toggle positions.
Drive Strength Control for H1 [2:0], H2 [5:3], H3 [8:6], H4 [11:9], and
RG [14:12]. Drive Current Values: 0 = Off, 1 = 4.3 mA, 2 = 8.6 mA,
3 = 12.9 mA, 4 = 17.2 mA, 5 = 21.5 mA, 6 = 25.8 mA, 7 = 30.1 mA.
SHP/SHD Sample Control: SHP Sampling Location [5:0].
SHD Sampling Location [11:6].
DOUT Phase Control [5:0]. DCLK Mode [6]. DOUTDELAY [8:7].
Table XX. CLPOB Masking Register Map
Address Content Value Register Name
40
[23:0] FFFFFF CLPMASK01
41
[23:0] FFFFFF CLPMASK23
42
[11:0] FFFFFF CLPMASK4
Data Bit Default
Register Description
CLPOB Line Masking. Line #0 [11:0]. Line #1 [23:0].
CLPOB Line Masking. Line #2 [11:0]. Line #3 [23:0].
CLPOB Line Masking. Line #4 [11:0].
Table XXI. SG Pattern Register Map
Address Content Value Register Name
50
[3:0] F SGPOL
51
[23:0] FFFFFF SGTOG12_0
52
[23:0] FFFFFF SGTOG12_1
53
[23:0] FFFFFF SGTOG12_2
54
[23:0] FFFFFF SGTOG12_3
Data Bit Default
Register Description
Start Polarity for SG Patterns. Pattern #0 [0]. Pattern #1 [1].
Pattern #2 [2]. Pattern #3 [3].
Pattern #0. Toggle Position 1 [11:0]. Toggle Position 2 [23:12].
Pattern #1. Toggle Position 1 [11:0]. Toggle Position 2 [23:12].
Pattern #2. Toggle Position 1 [11:0]. Toggle Position 2 [23:12].
Pattern #3. Toggle Position 1 [11:0]. Toggle Position 2 [23:12].
Table XXII. Shutter Control Register Map
Address Content Value Register Name
60
[4:0] 0 TRIGGER
61
[2:0] 2 READOUT
62
[11:0] 0 EXPOSURE
[12] 0 VDHDOFF
63
[11:0] 0 SUBCKSUPPRESS
[23:12] 0 SUBCKNUM
64
[0] 1 SUBCKPOL
65
[23:0] FFFFFF SUBCK1TOG
66
[23:0] FFFFFF SUBCK2TOG
Data Bit Default
Register Description
Trigger for VSUB [0], MSHUT [1], STROBE [2], Exposure [3], and
Readout [4]. Note that to trigger the Readout to automatically occur after the
Exposure period, both Exposure and Readout should be triggered together.
Number of Fields to Suppress the SUBCK Pulses after the VSG Line.
Number of Fields to Suppress the SUBCK and VSG Pulses.
Set = 1 to Disable the VD/HD Outputs during exposure (when >1 field).
Number of SUBCK Pulses to Suppress after VSG Line.
Number of SUBCK Pulses per Field.
SUBCK Pulse Start Polarity.
First SUBCK Pulse. Toggle Position 1 [11:0]. Toggle Position 2 [23:0].
Second SUBCK Pulse. Toggle Position 1 [11:0]. Toggle Position 2 [23:0].
REV. 0
相關(guān)PDF資料
PDF描述
AD9991KCP 10-Bit CCD Signal Processor with Precision Timing Generator
AD9991 10-Bit CCD Signal Processor with Precision Timing Generator
AD9992 12-Bit CCD Signal Processor with Precision Timing Generator
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參數(shù)描述
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AD9991KCPZRL 功能描述:IC CCD SIGNAL PROCESSOR 56-LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測(cè)器接口 系列:- 其它有關(guān)文件:Automotive Product Guide 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數(shù)字 輸出類型:數(shù)字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:20-TSSOP 包裝:管件
AD9992 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit CCD Signal Processor with Precision Timing Generator
AD9992_07 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit CCD Signal Processor with Precision Timing Generator
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