參數(shù)資料
型號(hào): AD9991KCP
廠商: ANALOG DEVICES INC
元件分類(lèi): 消費(fèi)家電
英文描述: 10-Bit CCD Signal Processor with Precision Timing Generator
中文描述: SPECIALTY CONSUMER CIRCUIT, QCC56
封裝: 8 X 8 MM, MO-220-VLLD-2, LFCSP-56
文件頁(yè)數(shù): 52/60頁(yè)
文件大?。?/td> 826K
代理商: AD9991KCP
AD9991
–52–
Table XLII. V-Sequence 5 (VSEQ5)Register Map
Data Bit Default
Address Content Value Register Name Description
A8 [1:0] 0 HBLKMASK_5 Masking Polarity during HBLK. H1 [0]. H3 [1].
[2] 0 CLPOBPOL_5 CLPOB Start Polarity
[3] 0 PBLKPOL_5 PBLK Start Polarity
[7:4] 0 VPATSEL_5 Selected V-Pattern Group for V-Sequence 5
[9:8] 0 VMASK_5 Enable Masking of V-Outputs (Specified by Freeze/Resume Registers)
[11:10] 0 HBLKALT_5 Enable HBLK Alternation
[23:12] 0 UNUSED Unused
A9 [11:0] 0 VPATREPO_5 Number of Selected V-Pattern Group Repetitions for Odd Lines
[23:12] 0 VPATREPE_5 Number of Selected V-Pattern Group Repetitions for Even Lines
AA [11:0] 0 VPATSTART_5 Start Position in the Line for the Selected V-Pattern Group
[23:12] 0 HDLEN_5 HD Line Length (Number of Pixels) for V-Sequence 5
AB [11:0] 0 PBLKTOG1_5 PBLK Toggle Position 1 for V-Sequence 5
[23:12] 0 PBLKTOG2_5 PBLK Toggle Position 2 for V-Sequence 5
AC [11:0] 0 HBLKTOG1_5 HBLK Toggle Position 1 for V-Sequence 5
[23:12] 0 HBLKTOG2_5 HBLK Toggle Position 2 for V-Sequence 5
AD [11:0] 0 HBLKTOG3_5 HBLK Toggle Position 3 for V-Sequence 5
[23:12] 0 HBLKTOG4_5 HBLK Toggle Position 4 for V-Sequence 5
AE [11:0] 0 HBLKTOG5_5 HBLK Toggle Position 5 for V-Sequence 5
[23:12] 0 HBLKTOG6_5 HBLK Toggle Position 6 for V-Sequence 5
AF [11:0] 0 CLPOBTOG1_5 CLPOB Toggle Position 1 for V-Sequence 5
[23:12] 0 CLPOBTOG2_5 CLPOB Toggle Position 2 for V-Sequence 5
Table XLIII. V-Sequence 6 (VSEQ6) Register Map
Data Bit Default
Address Content Value Register Name Description
B0 [1:0] 0 HBLKMASK_6 Masking Polarity during HBLK. H1 [0]. H3 [1].
[2] 0 CLPOBPOL_6 CLPOB StartPolarity
[3] 0 PBLKPOL_6 PBLK Start Polarity
[7:4] 0 VPATSEL_6 Selected V-Pattern Group for V-Sequence 6
[9:8] 0 VMASK_6 Enable Masking of V-Outputs (Specified by Freeze/Resume Registers)
[11:10] 0 HBLKALT_6 Enable HBLK Alternation
[23:12] 0 UNUSED Unused
B1 [11:0] 0 VPATREPO_6 Number of Selected V-Pattern Group Repetitions for Odd Lines
[23:12] 0 VPATREPE_6 Number of Selected V-Pattern Group Repetitions for Even Lines
B2 [11:0] 0 VPATSTART_6 Start Position in the Line for the Selected V-Pattern Group
[23:12] 0 HDLEN_6 HD Line Length (Number of Pixels) for V-Sequence 6
B3 [11:0] 0 PBLKTOG1_6 PBLK Toggle Position 1 for V-Sequence 6
[23:12] 0 PBLKTOG2_6 PBLK Toggle Position 2 for V-Sequence 6
B4 [11:0] 0 HBLKTOG1_6 HBLK Toggle Position 1 for V-Sequence 6
[23:12] 0 HBLKTOG2_6 HBLK Toggle Position 2 for V-Sequence 6
B5 [11:0] 0 HBLKTOG3_6 HBLK Toggle Position 3 for V-Sequence 6
[23:12] 0 HBLKTOG4_6 HBLK Toggle Position 4 for V-Sequence 6
B6 [11:0] 0 HBLKTOG5_6 HBLK Toggle Position 5 for V-Sequence 6
[23:12] 0 HBLKTOG6_6 HBLK Toggle Position 6 for V-Sequence 6
B7 [11:0] 0 CLPOBTOG1_6 CLPOB Toggle Position 1 for V-Sequence 6
[23:12] 0 CLPOBTOG2_6 CLPOB Toggle Position 2 for V-Sequence 6
REV. 0
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