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參數(shù)資料
| 型號： | AD9953ASV |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字信號處理外設 |
| 英文描述： | 400 MSPS 14-Bit, 1.8V CMOS Direct Digital Synthesizer |
| 中文描述： | DSP-NUM CONTROLLED OSCILLATOR, PQFP48 |
| 封裝： | TQFP-48 |
| 文件頁數(shù)： | 31/42頁 |
| 文件大?。?/td> | 473K |
| 代理商： | AD9953ASV |
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PRELIMINARY TECHNICAL DATA
Phase dithering is independently controlled on the four least significant bits of the phase word
routed to the angle rotation function. That is, any or all of the phase word four least significant bits
may be dithered or not dithered, controlled by the user via the serial port. Specifically, the
CFR1<19> bit controls the phase dithering enable function of the phase word <16> bit. The
CFR1<18> bit controls the phase dithering enable function of the phase word <15> bit. The
CFR1<17> bit controls the phase dithering enable function of the phase word <14> bit. The
CFR1<16> bit controls the phase dithering enable function of the phase word <13> bit. This
enable function is such that if the bit is high, dithering is enabled. If the bit is low, dithering is not
enabled.
Amplitude dithering uses one control bit to enable or disable dithering. If the amplitude dither
enable bit (CFR1<20>) is logic 0, no amplitude dithering is enabled and the data from the DDS
core is passed unchanged. When high, amplitude dithering is enabled.
Shaped On-Off Keying
General Description:
The Shaped On-Off keying function of the AD9953 allows the user to
control the ramp-up and ramp-down time of an “on-off” emission from the DAC. This function is
used in “burst transmissions” of digital data to reduce the adverse spectral impact of short, abrupt
bursts of data.
AUTO and MANUAL Shaped On-Off Keying modes are supported. The AUTO mode generates a
linear scale factor at a rate determined by the Amplitude Ramp Rate (ARR) Register controlled by
an external pin (OSK). MANUAL mode allows the user to directly control the output amplitude by
writing the scale factor value into the Amplitude Scale Factor (ASF) Register (ASF).
The Shaped On-Off keying function may be bypassed (disabled) by clearing the OSK Enable bit
(CFR1<25>=0).
The modes are controlled by two bits located in the most significant byte of the Control Function
Register (CFR). CFR1<25> is the Shaped On-Off Keying enable bit. When CFR1<25> is set, the
output scaling function is enabled; CFR1<25> bypasses the function. CFR1<24> is the internal
Shaped On-Off Keying active bit. When CFR1<24> is set, internal Shaped On-Off Keying mode is
active; CFR1<24> cleared is external Shaped On-Off Keying mode active. CFR1<24> is a “Don’t
care” if the Shaped On-Off Keying enable bit (CFR1<25>) is cleared. The power up condition is
Shaped On-Off Keying disabled (CFR1<25> = 0). Figure C below shows the block diagram of the
OSK circuitry.
AD9953
REV. PrB 1/30/03
Page 31
Analog Devices, Inc.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD9953PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:400 MSPS 14-Bit, 1.8V CMOS Direct Digital Synthesizer |
| AD9953YSV | 制造商:Analog Devices 功能描述:Direct Digital Synthesizer 400MHz 1-DAC 14-Bit Serial 48-Pin TQFP EP 制造商:Rochester Electronics LLC 功能描述:AD9953 400 MSPS DDS W/ 14 BIT DAC - Bulk 制造商:Analog Devices 功能描述:IC DDS 400MSPS SMD 9953 TQFP48 |
| AD9953YSV-REEL7 | 制造商:Analog Devices 功能描述:Direct Digital Synthesizer 400MHz 1-DAC 14-Bit Serial 48-Pin TQFP EP T/R |
| AD9953YSVZ | 功能描述:IC DDS DAC 14BIT 400MSPS 48-TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標準包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:帶卷 (TR) |
| AD9953YSVZ-REEL7 | 功能描述:IC DDS DAC 14BIT 1.8V 48TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標準包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:帶卷 (TR) |
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