
AD9882A
Rev. 0 | Page 3 of 40
SPECIFICATIONS
VD = 3.3 V, VDD = 3.3 V, ADC clock = maximum conversion rate, unless otherwise noted.
Table 1. Analog Interface Electrical Characteristics
AD9882AKSTZ-100
AD9882AKSTZ-140
Parameter
Temp
Test Level
Min
Typ
Max
Min
Typ
Max
Unit
RESOLUTION
8
Bits
DC ACCURACY
Differential Nonlinearity
25°C
I
±0.5
+1.25/–1.0
±0.5
+1.35/–1.0
LSB
Full
VI
+1.35/–1.0
+1.45/–1.0
LSB
Integral Nonlinearity
25°C
I
±0.5
±1.85
±0.5
±2.0
LSB
Full
VI
±2.0
±2.3
LSB
No Missing Codes
Full
VI
Guaranteed
ANALOG INPUT
Input Voltage Range
Minimum
Full
VI
0.5
V p-p
Maximum
Full
VI
1.0
V p-p
Gain Tempco
25°C
V
100
ppm/°C
Input Bias Current
Full
IV
1
A
Input Full-Scale Matching
Full
VI
1.5
8.0
1.5
8.0
% FS
Offset Adjustment Range
Full
VI
45
49
56
45
49
56
% FS
REFERENCE OUTPUT
Output Voltage
Full
VI
1.25
V
Temperature Coefficient
Full
V
±50
ppm/°C
Maximum Conversion Rate
Full
VI
100
140
MSPS
Minimum Conversion Rate
Full
IV
10
MSPS
Clock to Data Skew, tSKEW
Full
IV
–0.5
+2.0
–0.5
+2.0
ns
Serial Port Timing
tBUFF
Full
VI
4.7
s
tSTAH
Full
VI
4.0
s
tDHO
Full
VI
250
ns
tDAL
Full
VI
4.7
s
tDAH
Full
VI
4.0
s
tDSU
Full
VI
250
ns
tSTASU
Full
VI
4.7
s
tSTOSU
Full
VI
4.0
s
Hsync Input Frequency
Full
IV
15
110
15
110
kHz
Maximum PLL Clock Rate
Full
VI
100
140
MHz
Minimum PLL Clock Rate
Full
IV
12
MHz
PLL Jitter
25°C
IV
500
500
700
2
ps p-p
Full
IV
1000
2
1000
2
ps p-p
Sampling Phase Tempco
Full
IV
15
ps/°C
DIGITAL INPUTS
Input Voltage, High (VIH)
Full
VI
2.6
V
Input Voltage, Low (VIL)
Full
VI
0.8
V
Input Current, High (IIH)
Full
IV
–1.0
A
Input Current, Low (IIL)
Full
IV
1.0
A
Input Capacitance
25°C
V
3
pF
DIGITAL OUTPUTS
1
Output Voltage, High (VOH)
Full
IV
VDD – 0.1
V
Output Voltage, Low (VOL)
Full
IV
0.4
V
Duty Cycle, DATACK
Full
IV
45
50
55
45
50
55
%