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參數(shù)資料
| 型號： | AD9873-EB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Analog Front End Converter for Set-Top Box, Cable Modem |
| 中文描述： | 模擬前端轉(zhuǎn)換器，用于機頂盒，電纜調(diào)制解調(diào)器 |
| 文件頁數(shù)： | 5/39頁 |
| 文件大?。?/td> | 935K |
| 代理商： | AD9873-EB |
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REV. 0
–5–
AD9873
Test
Level
Parameter
12-BIT ADC CHARACTERISTICS (Continued)
Dynamic Performance (A
IN
= –0.5 dB FS, f = 5 MHz)
Signal-to-Noise and Distortion Ratio (SINAD)
Signal-to-Noise and Distortion Ratio (SINAD)
3
Effective Number of Bits (ENOB)
Effective Number of Bits (ENOB)
3
Signal-to-Noise Ratio (SNR)
Signal-to-Noise Ratio (SNR)
3
Total Harmonic Distortion (THD)
Total Harmonic Distortion (THD)
3
Spurious Free Dynamic Range (SFDR)
Spurious Free Dynamic Range (SFDR)
3
Differential Phase
Differential Gain
VIDEO CLAMP INPUT
Input Voltage Range
Clamp Current Positive
Clamp Droop Current
Clamp Level Offset Programming Range
Clamp Level Resolution
Carrier Rejection Filter Bandwidth (–3 dB)
Dynamic Performance (A
IN
= –0.5 dB FS, f = 5 MHz)
Signal-to-Noise and Distortion Ratio (SINAD)
Effective Number of Bits (ENOB)
Signal-to-Noise Ratio (SNR)
Total Harmonic Distortion (THD)
Spurious Free Dynamic Range (SFDR)
Differential Phase
Differential Gain
CHANNEL-TO-CHANNEL ISOLATION
Tx DAC-to-ADC Isolation
(5 MHz Analog Output)
Isolation Between Tx and 8-Bit ADCs
Isolation Between Tx and 10-Bit ADC
Isolation Between Tx and 12-Bit ADC
ADC-to-ADC Isolation
(A
IN
= –0.5 dB FS, f = 5 MHz)
Isolation Between IF12 and Video
Isolation Between IF10 and IF12
Isolation Between Q in and IF10
Isolation Between Q in and I Inputs
TIMING CHARACTERISTICS
(20 pF Load)
Wake-Up Time
Minimum RESET Pulsewidth Low (t
RL
)
Digital Output Rise/Fall Time
Tx/Rx Interface
MCLK Frequency (f
MCLK
)
TxSYNC/TxIQ Set Up Time (t
SU
)
TxSYNC/TxIQ Hold Time (t
HD
)
RxSYNC/RxIQ/IF to Valid Time (t
TV
)
RxSYNC/RxIQ/IF Hold Time (t
HT
)
Serial Control Bus
SCLK Frequency (f
SCLK
)
Clock Pulsewidth High (t
PWH
)
Clock Pulsewidth Low (t
PWL
)
Clock Rise/Fall Time
Data/Chip-Select Setup Time (t
DS
)
Data Hold Time (t
DH
)
Data Valid Time (t
DV
)
Temp
Min
Typ
Max
Unit
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
25 C
25 C
III
IV
III
IV
III
IV
III
IV
III
IV
IV
IV
62.3
65
67.4
10.5
10.8
65.3
67.4
–77.6
–77.6
80
80
<0.1
<1
dB
dB
Bits
Bits
dB
dB
dB
dB
dB
dB
Degree
LSB
10.0
63.3
–65.4
65.7
Full
25 C
25 C
25 C
25 C
25 C
IV
IV
IV
III
IV
IV
2
1.3
2
512
16
0.6
V
mA
A
LSB
LSB
MHz
256
2032
Full
Full
Full
Full
Full
25
°
C
25
°
C
IV
IV
IV
IV
IV
IV
IV
52
8.34
61.0
–53.0
55.0
<0.1
<8
dB
Bits
dB
dB
dB
Degree
LSB
25 C
25 C
25 C
IV
IV
IV
>80
>85
>90
dB
dB
dB
25 C
25 C
25 C
25 C
III
IV
IV
IV
70
>70
>80
>80
>70
dB
dB
dB
dB
N/A
N/A
25 C
N/A
N/A
III
200
t
MCLK
Cycles
t
MCLK
Cycles
ns
5
2.8
4
25 C
25 C
25 C
25 C
25 C
III
III
III
III
III
66
MHz
ns
ns
ns
ns
3
3
5.2
0.2
Full
Full
Full
Full
Full
Full
Full
III
III
III
III
III
III
III
15
MHz
ns
ns
ms
ns
ns
ns
30
30
1
25
0
30
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9873JS | Analog Front End Converter for Set-Top Box, Cable Modem |
| AD9874 | IF Digitizing Subsystem |
| AD9874BST | IF Digitizing Subsystem |
| AD9874EB | IF Digitizing Subsystem |
| AD9875BSTRL | Broadband Modem Mixed-Signal Front End |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9873JS | 制造商:Analog Devices 功能描述: |
| AD9874 | 制造商:AD 制造商全稱:Analog Devices 功能描述:IF Digitizing Subsystem |
| AD9874ABST | 功能描述:IC IF DIGIT SUBSYSTEM 48-LQFP RoHS:否 類別:RF/IF 和 RFID >> RF 其它 IC 和模塊 系列:- 標準包裝:100 系列:* |
| AD9874ABST | 制造商:Analog Devices 功能描述:IF DIGITIZING SYBSYSTEM ((NW)) 制造商:Analog Devices 功能描述:IC, IF DIGITIZING SUBSYSTEM, LQFP-48 |
| AD9874ABST | 制造商:Analog Devices 功能描述:IC IF DIG SUBSYSTEM |
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