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參數(shù)資料
| 型號(hào)： | AD9860PCB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Mixed-Signal Front-End (MxFE⑩) Processor for Broadband Communications |
| 中文描述： | 混合寬帶通信信號(hào)前端（MxFE⑩）處理器 |
| 文件頁數(shù)： | 25/32頁 |
| 文件大?。?/td> | 617K |
| 代理商： | AD9860PCB |
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REV. 0
AD9860/AD9862
–25–
t
R
1
t
R
3
t
R
2
t
R
1
f
CLKOUT1
Rx DATA TIMING No. 1
f
Rx
= CLKOUT 4
Rx DATA TIMING No. 2
f
Rx
= CLKOUT 2
Rx DATA TIMING No. 3
f
Rx
= CLKOUT
Rx DATA TIMING No. 4
f
Rx
= 2 CLKOUT
Figure 9. Rx Timing Diagram
0: B = A
1: B = A/2
00: C = B
01: C = B/2
10: C = B/4
00: E = D
01: E = 2 D
10: E = 4 D
ADC SAMPLE RATE
(NOT TO EXCEED 64MHz)
DLL OUTPUT RATE
(NOT TO EXCEED 128MHz)
CLKOUT2
INPUT Tx DATA RATE
(SINGLE CHANNEL)
TxDAC UPDATE RATE
SINGLE CHANNEL
(CANNOT EXCEED
DLL OUTPUT RATE)
CLKIN
A
B
D
E
ADC DIV2
DLL MULT
INTERP
00: D = C
01: D = C/2
10: D = C/4
C
CLKOUT2 DIV
Figure 10. Single Tx Timing Block Diagram, Alternative Operation
Table I. Rx Data Timing Table
Table Ia. CLKSEL Set Logic Low
ADC
Div 2
See Figure 8 for
Relative Timing
CLKSEL
Decimate
Multiplex
Timing No. 4
Rx Data = 2
CLKOUT1
CLKOUT1 = 1
2
CLKIN
No Mux
Mux
Not Allowed
Timing No. 3
Rx Data = 2
CLKOUT1
CLKOUT1 = 1
2
CLKIN
No Mux
Timing No. 4
Mux
Rx Data(MUXED) = 2
CLKOUT1
CLKOUT1 = 1
2
CLKIN
Timing No. 3
Rx Data = CLKOUT1
CLKOUT1 = 1
2
CLKIN
No Mux
Timing No. 4
Mux
Rx Data(MUXED) = 2
CLKOUT1
CLOUT1 = 1
2
CLKIN
Timing No. 2
No Mux
Rx Data = 1
2
CLKOUT1
CLOUT1 = 1
2
CLKIN
Timing No. 3
Mux
Rx Data(MUXED) = CLKOUT1
CLKOUT1 = 1
2
CLKIN
Low
Div
No
Div
No
Decimation
No
Decimation
Decimation
Decimation
Table Ib. CLKSEL Set Logic High
ADC
Div 2
See Figure 8 for
Relative Timing
CLKSEL
Decimate
Multiplex
Timing No. 3
Rx Data = CLKOUT1
CLKOUT1 = CLKIN
No Mux
Timing No. 4
Mux
Rx Data(MUXED) = 2
CLKOUT1
CLKOUT1 = CLKIN
Timing No. 2
No Mux
Rx Data = 1
2
CLKOUT1
CLKOUT1 =
CLKIN
Timing No. 3
Mux
Rx Data(MUXED) = CLKOUT1
CLKOUT1 =
CLKIN
Timing No. 2
No Mux
Rx Data = 1
2
CLKOUT1
CLKOUT1 = CLKIN
Timing No. 3
Mux
Rx Data(MUXED) = CLKOUT1
CLOUT1 = CLKIN
Timing No. 1
No Mux
Rx Data = 1
4
CLKOUT1
CLOUT1 = CLKIN
Timing No. 2
Mux
Rx Data(MUXED) = 1
2
CLKOUT1
CLKOUT1 = CLKIN
High
Div
No
Div
No
Decimation
No
Decimation
Decimation
Decimation
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PDF描述 |
|---|---|
| AD9862 | Mixed-Signal Front-End (MxFE⑩) Processor for Broadband Communications |
| AD9862BST | Mixed-Signal Front-End (MxFE⑩) Processor for Broadband Communications |
| AD9864 | IF Digitizing Subsystem |
| AD9864-EB | IF Digitizing Subsystem |
| AD9864BCPZ | IF Digitizing Subsystem |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9861 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Mixed-Signal Front-End (MxFE⑩) Baseband Transceiver for Broadband Applications |
| AD9861-50EB | 制造商:Analog Devices 功能描述: |
| AD9861-50EBZ | 功能描述:BOARD EVALUATION FOR AD9861-50 RoHS:是 類別:RF/IF 和 RFID >> RF 評(píng)估和開發(fā)套件，板 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類型:GPS 接收器 頻率:1575MHz 適用于相關(guān)產(chǎn)品:- 已供物品:模塊 其它名稱:SER3796 |
| AD9861-80EB | 制造商:Analog Devices 功能描述: |
| AD9861-80EBZ | 功能描述:BOARD EVALUATION FOR AD9861 RoHS:是 類別:RF/IF 和 RFID >> RF 評(píng)估和開發(fā)套件，板 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類型:GPS 接收器 頻率:1575MHz 適用于相關(guān)產(chǎn)品:- 已供物品:模塊 其它名稱:SER3796 |
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