參數(shù)資料
型號(hào): AD9860BST
廠商: ANALOG DEVICES INC
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Mixed-Signal Front-End (MxFE⑩) Processor for Broadband Communications
中文描述: SPECIALTY TELECOM CIRCUIT, PQFP128
封裝: PLASTIC, LQFP-128
文件頁數(shù): 10/32頁
文件大?。?/td> 617K
代理商: AD9860BST
REV. 0
–10–
AD9860/AD9862
FFT OUTPUT – MHz
5
F
20
–20
–40
–60
–80
10
15
25
30
0
–100
–120
0
TPC 10. ADC Dual Tone FFT with
Buffer Tones at 4.5 MHz and 5.5 MHz
f
IN
– MHz
0
200
50
60
58
56
54
50
62
11.0
8.0
8.5
10.0
10.5
9.5
9.0
150
250
100
64
66
68
BUFFERED 1V
INPUT, 2 GAIN
BUFFERED
2V INPUT,
1
GAIN
BUFFERED BYPASS
1V INPUT, 2 GAIN
BUFFERED BYPASS
2V INPUT, 1 GAIN
52
300
TPC 13. AD9862 Rx SINAD
vs. f
IN
at 64 MSPS
f
IN
– MHz
0
200
50
60
58
56
54
52
50
48
62
46
44
10.0
7.0
7.5
9.0
9.5
8.5
8.0
150
250
100
BUFFERED BYPASS
1V INPUT, 2 GAIN
BUFFERED 1V
INPUT, 2 GAIN
BUFFERED BYPASS
2V INPUT, 1 GAIN
BUFFERED 2V
INPUT, 1 GAIN
300
TPC 16. AD9860 Rx SINAD
vs. f
IN
at 64 MSPS
FFT OUTPUT – MHz
5
F
20
–20
–40
–60
–80
10
15
25
30
0
–100
–120
0
TPC 11. ADC Dual Tone FFT without
Buffer Tones at 4.5 MHz and 5.5 MHz
f
IN
– MHz
0
200
50
S
60
58
56
54
52
50
62
150
250
100
64
66
68
70
300
LOW POWER MODE 1, BUFFER BYPASSED,
2V p-p INPUT, 1
RxPGA GAIN
BUFFER BYPASSED, 2V p-p,
1
RxPGA GAIN
LOW POWER MODE 1, BUFFER
ENABLED, 1V p-p INPUT,
2
RxPGA GAIN
BUFFER ENABLED,
1V p-p INPUT,
2
RxPGA GAIN
TPC 14. AD9862 Rx SINAD
vs. f
IN
at 32 MSPS
f
IN
– MHz
0
200
50
S
52
50
48
46
44
54
150
250
100
56
58
60
62
300
LOW POWER MODE 1, BUFFER BYPASSED,
2V p-p INPUT, 1
RxPGA GAIN
BUFFER BYPASSED, 2V p-p,
1
RxPGA GAIN
LOW POWER
MODE 1,
BUFFER ENABLED,
1V p-p INPUT,
2
RxPGA GAIN
BUFFER ENABLED,
1V p-p INPUT,
2
RxPGA GAIN
TPC 17. AD9860 Rx SINAD
vs. f
IN
at 32 MSPS
FFT OUTPUT – MHz
5
F
20
–20
–40
–60
–80
10
15
25
30
0
–100
–120
0
TPC 12. ADC Dual Tone FFT
(undersampling) without Buffer
Tones at 69.5 MHz and 70.5 MHz
f
IN
– MHz
0
200
50
S
60
58
56
54
52
50
62
150
250
100
64
66
68
70
300
LOW POWER MODE 2, BUFFER BYPASSED,
2V p-p INPUT, 1
RxPGA GAIN
BUFFER BYPASSED, 2V p-p,
1
RxPGA GAIN
LOW POWER MODE 2, BUFFER
ENABLED, 1V p-p INPUT,
2
RxPGA GAIN
BUFFER ENABLED,
1V p-p INPUT,
2
RxPGA GAIN
TPC 15. AD9862 Rx SINAD
vs. f
IN
at 16 MSPS
f
IN
– MHz
0
200
50
S
52
50
48
46
44
54
150
250
100
56
58
60
62
300
LOW POWER MODE 2, BUFFER BYPASSED,
2V p-p INPUT, 1
RxPGA GAIN
BUFFER BYPASSED, 2V p-p,
1
RxPGA GAIN
LOW POWER
MODE 2,
BUFFER ENABLED,
1V p-p INPUT,
2
RxPGA GAIN
BUFFER ENABLED,
1V p-p INPUT,
2
RxPGA GAIN
TPC 18. AD9860 Rx SINAD
vs. f
IN
at 16 MSPS
相關(guān)PDF資料
PDF描述
AD9860PCB Mixed-Signal Front-End (MxFE⑩) Processor for Broadband Communications
AD9862 Mixed-Signal Front-End (MxFE⑩) Processor for Broadband Communications
AD9862BST Mixed-Signal Front-End (MxFE⑩) Processor for Broadband Communications
AD9864 IF Digitizing Subsystem
AD9864-EB IF Digitizing Subsystem
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