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參數(shù)資料
| 型號： | AD9858FDPCB |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | XO, clock |
| 英文描述： | 1 GSPS Direct Digital Synthesizer |
| 中文描述： | 1 GSPS的直接數(shù)字頻率合成器 |
| 文件頁數(shù)： | 9/32頁 |
| 文件大小： | 1412K |
| 代理商： | AD9858FDPCB |
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AD9858
Pin No.
71
72
Rev. A | Page 9 of 32
Mnemonic
DIV
DIV
I/O
I
I
Description
Phase Frequency Detector Feedback Input.
Phase Frequency Detector Feedback Complementary Input. Note that when the DIV port is
operated in single-ended mode, DIV should be decoupled to AVDD with a 0.1 μF capacitor.
DAC Baseline Decoupling Pin, Typically Bypassed to Pin 77 with a 0.1 μF Capacitor.
A Resistor Connected from DACISET to AGND Establishes the Reference Current for the DAC.
DAC Output.
DAC Complementary Output.
I/O Port Serial/Parallel Programming Mode Select Pin. Logic 0: serial programming mode.
Logic 1: parallel programming mode.
Active High Hardware Reset Pin. Assertion of the RESET pin forces the AD9858 to its default
operating conditions.
Used to Select One of the Four Internal Profiles. These pins are synchronous to the
SYNCLK output.
Frequency Update. The rising edge transfers the contents of the internal buffer registers to the
memory registers. This pin is synchronous to the SYNCLK output.
Clock Output Pin that Serves as a Synchronizer for External Hardware. SYNCLK runs at REFCLK/8.
78
79
81, 82
83, 84
91
DACBP
DACISET
IOUT
IOUT
SPSELECT
I
O
O
I
92
RESET
I
97, 98
PS0, PS1
I
99
FUD
I
100
SYNCLK
O
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PDF描述 |
|---|---|
| AD9859 | 400 MSPS, 10-Bit, 1.8 V CMOS Direct Digital Synthesizer |
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相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9858PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:1 GSPS Direct Digital Synthesizer |
| AD9858TLPCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:1 GSPS Direct Digital Synthesizer |
| AD9858XSV | 制造商:Analog Devices 功能描述: |
| AD9859 | 制造商:AD 制造商全稱:Analog Devices 功能描述:400 MSPS, 10-Bit, 1.8 V CMOS Direct Digital Synthesizer |
| AD9859/PCB | 制造商:Analog Devices 功能描述:NCO, 400MSPS 10 BIT, 1.8V CMOS DIRECT DGTL SYNTHESIZER - Bulk |
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