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參數(shù)資料
| 型號(hào)： | AD9845A |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Complete 12-Bit 30 MSPS CCD Signal Processor |
| 中文描述： | 完整的12位30 MSPS的CCD信號(hào)處理器 |
| 文件頁數(shù)： | 3/22頁 |
| 文件大?。?/td> | 252K |
| 代理商： | AD9845A |
REV. 0
–3–
AD9845A
Parameter
Min
Typ
Max
Unit
Notes
P
OWER CONSUMPTION
140
mW
See TPC 1 for Power Curves
MAXIMUM CLOCK RATE
30
MHz
CDS
Gain
Allowable CCD Reset Transient
1
Max Input Range Before Saturation
1
Max CCD Black Pixel Amplitude
1
0
500
dB
mV
V p-p
mV
See Input Waveform in Footnote 1
PxGA
Gain at 4 dB
1.0
200
PIXEL GAIN AMPLIFIER (
PxGA
)
Max Input Range
Max Output Range
Gain Control Resolution
Gain Monotonicity
Gain Range (Two’s Complement Coding)
Min Gain (
PxGA
Gain Code 32)
Max Gain (
PxGA
Gain Code 31)
1.0
1.6
V p-p
V p-p
Steps
64
Guaranteed
See Figure 28 for
PxGA
Gain Curve
–2
10
dB
dB
VARIABLE GAIN AMPLIFIER (VGA)
Max Input Range
Max Output Range
Gain Control Resolution
Gain Monotonicity
Gain Range
Low Gain (VGA Gain Code 91)
Max Gain (VGA Gain Code 1023)
1.6
2.0
V p-p
V p-p
Steps
1024
Guaranteed
See Figure 29 for VGA Gain Curve
2
36
dB
dB
BLACK LEVEL CLAMP
Clamp Level Resolution
Clamp Level
Min Clamp Level
Max Clamp Level
256
Steps
Measured at ADC Output
0
255
LSB
LSB
SYSTEM PERFORMANCE
Gain Accuracy (VGA Code 91 to 1023)
2
PxGA
Gain Accuracy
Min Gain (
PxGA
Register Code 32)
Max Gain (
PxGA
Code 31)
Peak Nonlinearity, 500 mV Input Signal
Total Output Noise
Power Supply Rejection (PSR)
Specifications Include Entire Signal Chain
Use Equations on Page 18 to Calculate Gain
–0.5
+0.5
–1
11
0
12
0.1
0.6
40
+1
13
dB
dB
%
LSB rms
dB
VGA Gain Fixed at 2 dB (Code 91)
VGA Gain Fixed at 2 dB (Code 91)
12 dB Gain Applied
AC Grounded Input, 6 dB Gain Applied
Measured with Step Change on Supply
POWER-UP RECOVERY TIME
Fast Recovery Mode
Reference Standby Mode
Total Shutdown Mode
Power-Off Condition
Normal Clock Signals Applied
0.1
1
3
15
ms
ms
ms
ms
NOTES
1
Input Signal Characteristics defined as follows:
OPTI200mV MAX
RE500mV TYP
INPUT 1V MAX
2
PxGA
gain fixed at 4 dB (Code 63).
Specifications subject to change without notice.
CCD-MODE SPECIFICATIONS
(T
MIN
to T
MAX
, AVDD = DVDD = 3.0 V, f
DATACLK
= f
SHP
= f
SHD
= 30 MHz, unless otherwise noted.)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9845AJST | Complete 12-Bit 30 MSPS CCD Signal Processor |
| AD9846A | Complete 10-Bit 30 MSPS CCD Signal Processor |
| AD9846AJST | Complete 10-Bit 30 MSPS CCD Signal Processor |
| AD9847 | 10-Bit 40 MSPS CCD Signal Processor with Integrated Timing Driver |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9845AJST | 制造商:Analog Devices 功能描述:CCD Signal Processor 48-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:12 BIT 30 MHZ AFE NO PXGA - Bulk |
| AD9845AJSTRL | 制造商:Analog Devices 功能描述:CCD Signal Processor 48-Pin LQFP T/R 制造商:Analog Devices 功能描述:CCD SGNL PROCESSOR 48LQFP - Tape and Reel |
| AD9845B | 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete 12-Bit 30 MSPS CCD Signal Processor |
| AD9845BJST | 制造商:Analog Devices 功能描述:CCD SGNL PROCESSOR 48LQFP - Trays 制造商:Rochester Electronics LLC 功能描述: |
| AD9845BJSTRL | 制造商:Analog Devices 功能描述:CCD SGNL PROCESSOR 48LQFP - Tape and Reel 制造商:Rochester Electronics LLC 功能描述:12 BIT 30MHZ AFE NO PXGA - Tape and Reel |
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