參數(shù)資料
型號(hào): AD9774EB
廠商: Analog Devices, Inc.
英文描述: 14-Bit, 32 MSPS TxDAC⑩ with 4x Interpolation Filters
中文描述: 14位,32 MSPS的TxDAC系列⑩4倍內(nèi)插濾波器
文件頁(yè)數(shù): 13/24頁(yè)
文件大小: 313K
代理商: AD9774EB
AD9774
–13–
REV. B
50pF
+1.2V REF
AVDD
REFLO
CURRENT
SOURCE
ARRAY
+2.7 TO +5.5V
A
REFIO
FS ADJ
R
SET
AD9774
EXTERNAL
REF
I
REF
=
V
REFIO
/R
SET
AVDD
REFERENCE
CONTROL
AMPLIFIER
V
REFIO
0.1
m
F
REFCOMP
Figure 28. External Reference Configuration
REFERENCE CONTROL AMPLIFIER
The AD9774 also contains an internal control amplifier that is
used to regulate the DAC’s full-scale output current, I
OUTFS
.
The control amplifier is configured as a V-I converter, as shown
in Figure 28, such that its current output, I
REF
, is determined by
the ratio of the V
REFIO
and an external resistor, R
SET
, as stated
in Equation 4. I
REF
is copied over to the segmented current
sources with the proper scaling factor to set I
OUTFS
as stated in
Equation 3.
The control amplifier allows a wide (10:1) adjustment span of
I
OUTFS
over a 2 mA to 20 mA range by setting I
REF
between
62.5
μ
A and 625
μ
A. The wide adjustment span of I
OUTFS
provides several application benefits. The first benefit relates
directly to the power dissipation of the AD9774, which is pro-
portional to I
OUTFS
(refer to the Power Dissipation section). The
second benefit relates to the 20 dB adjustment, which is useful
for system gain control purposes.
There are two methods by which I
REF
can be varied for a fixed
R
SET
. The first method is suitable for a single-supply system in
which the internal reference is disabled, and the common-mode
voltage of REFIO is varied over its compliance range of 1.25 V
to 0.10 V. REFIO can be driven by a single-supply amplifier or
DAC, thus allowing I
REF
to be varied for a fixed R
SET
. Since the
input impedance of REFIO is approximately 1 M
, a simple,
low cost R-2R ladder DAC configured in the voltage mode
topology may be used to control the gain. This circuit is shown
in Figure 30 using the AD7524 and an external 1.2 V reference,
the AD1580.
The second method may be used in a dual-supply system in
which the common-mode voltage of REFIO is fixed, and I
REF
is
varied by an external voltage, V
GC
, applied to R
SET
via an ampli-
fier. An example of this method is shown in Figure 29 in which
the internal reference is used to set the common-mode voltage
of the control amplifier to 1.20 V. The external voltage, V
GC
, is
referenced to ACOM and should not exceed 1.2 V. The value of
R
SET
is such that I
REFMAX
and I
REFMIN
do not exceed 62.5
μ
A
and 625
μ
A, respectively. The associated equations in Figure 29
can be used to determine the value of R
SET
.
50pF
+1.2V REF
AVDD
REFLO
CURRENT
SOURCE
ARRAY
+2.7 TO +5.5V
A
REFIO
FSADJ
R
SET
AD9774
I
REF
V
GC
1
m
F
I
REF
= (1.2–V
GC
)/R
SET
WITH V
GC
,
V
REFIO
AND 62.5
m
A
#
I
REF
#
625A
0.1
m
F
REFCOMP
Figure 29. Dual Supply Gain Control Circuit
ANALOG OUTPUTS
The AD9774 produces two complementary current outputs,
IOUTA and IOUTB, which may be configured for single-end or
differential operation. IOUTA and IOUTB can be converted
into complementary single-ended voltage outputs, V
OUTA
and
V
OUTB
, via a load resistor, R
LOAD
, as described in the DAC
Transfer Function section by Equations 5 through 8. The
differential voltage, V
DIFF
, existing between V
OUTA
and V
OUTB
,
can also be converted to a single-ended voltage via a transformer
or differential amplifier configuration.
Figure 31 shows the equivalent analog output circuit of the
AD9774 consisting of a parallel combination of PMOS differen-
tial current switches associated with each segmented current
source. The output impedance of IOUTA and IOUTB is deter-
mined by the equivalent parallel combination of the PMOS
switches and is typically 100 k
in parallel with 5 pF. Due to
the nature of a PMOS device, the output impedance is also
slightly dependent on the output voltage (i.e., V
OUTA
and V
OUTB
)
and, to a lesser extent, the analog supply voltage, AVDD, and
full-scale current, I
OUTFS
. Although the output impedance’s
signal dependency can be a source of dc nonlinearity and ac linear-
ity (i.e., distortion), its effects can be limited if certain precau-
tions are noted.
1.2V
50pF
+1.2V REF
AVDD
REFLO
CURRENT
SOURCE
ARRAY
+2.7 TO +5.5V
A
REFIO
FSADJ
R
SET
AD9774
I
REF
=
V
REF
/R
SET
AVDD
V
REF
V
DD
R
FB
OUT1
OUT2
AGND
DB7–DB0
AD7524
AD1580
0.1V TO 1.2V
0.1
m
F
REFCOMP
Figure 30. Single Supply Gain Control Circuit
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