參數(shù)資料
型號(hào): AD9767ASTZRL
廠商: Analog Devices Inc
文件頁數(shù): 28/44頁
文件大小: 0K
描述: IC DAC 14BIT DUAL 125MSPS 48LQFP
產(chǎn)品培訓(xùn)模塊: DAC Architectures
標(biāo)準(zhǔn)包裝: 2,000
系列: TxDAC+®
設(shè)置時(shí)間: 35ns
位數(shù): 14
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 模擬和數(shù)字
功率耗散(最大): 450mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 4 電流,單極;4 電流,雙極
采樣率(每秒): 125M
配用: AD9767-EBZ-ND - BOARD EVAL FOR AD9767
AD9763/AD9765/AD9767
Data Sheet
Rev. G | Page 34 of 44
EVALUATION BOARD
GENERAL DESCRIPTION
The AD9763/AD9765/AD9767-EBZ is an evaluation board
for the AD9763/AD9765/AD9767 10-/12-/14-bit dual DAC.
Careful attention to layout and circuit design, combined with a
prototyping area, allow the user to easily and effectively evaluate
the AD9763/AD9765/AD9767 in any application where a high
resolution, high speed conversion is required.
This board allows the user the flexibility to operate the AD9763/
AD9765/AD9767 in various configurations. Possible output
configurations include transformer coupled, resistor terminated,
and single-ended and differential outputs. The digital inputs can be
used in dual-port or interleaved mode and are designed to be
driven from various word generators, with the on-board option
to add a resistor network for proper load termination. When
operating the AD9763/AD9765/AD9767, best performance is
obtained by running the digital supply (DVDD1/DVDD2) at
3.3 V and the analog supply (AVDD) at 5 V.
SCHEMATICS
00
61
7-
0
86
L1
BEAD
VAL
VOLT
DCASE
VAL
VOLT
DCASE
DGND
C10
C9
DVDD
AVDD
2
TB1
1
TB1
BLK
RED
BLK
AVDDIN
AGND
L2
DVDDIN
3
TB1
4
TB1
R5
R2
R1
RCO M
R3
R4
R6
R7
R8
R9
R2
R1
RCO M
R3
R4
R5
R6
R7
R8
R9
R2
R1
RCO M
R3
R4
R5
R6
R7
R8
R9
R2
R1
RCO M
R3
R4
R5
R6
R7
R8
R9
22
1
10
9
8
7
6
5
4
3
2
1
10
9
8
7
6
5
4
3
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
1
RP16
RP10
RP15
RP9
INP1
INP31
INP32
INP33
INP34
INCK2
INP36
INP35
INP4
INP3
INP2
INP8
INP7
INP6
INP5
INP26
INP25
INP24
INP23
INP30
INP29
INP28
INP27
INP12
INP11
INP10
INP9
INCK1
INP14
INP13
Figure 86. Power Decoupling and Clocks on AD9763/AD9765/AD9767 Evaluation Board (1)
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