TMIN
參數(shù)資料
型號(hào)： AD9767-EBZ
廠商： Analog Devices Inc
文件頁數(shù)： 40/44頁
文件大小： 0K
描述： BOARD EVAL FOR AD9767
產(chǎn)品培訓(xùn)模塊： DAC Architectures
標(biāo)準(zhǔn)包裝： 1
系列： TxDAC+®
DAC 的數(shù)量： 2
位數(shù)： 14
采樣率（每秒）： 125M
數(shù)據(jù)接口： 并聯(lián)
設(shè)置時(shí)間： 35ns
DAC 型： 電流
工作溫度： -40°C ~ 85°C
已供物品： 板
已用 IC / 零件： AD9767
相關(guān)產(chǎn)品： AD9767ASTZRL-ND - IC DAC 14BIT DUAL 125MSPS 48LQFP
AD9767ASTZ-ND - IC DAC 14BIT DUAL 125MSPS 48LQFP
Data Sheet
AD9763/AD9765/AD9767
Rev. G | Page 5 of 44
SPECIFICATIONS
DC SPECIFICATIONS
TMIN to TMAX, AVDD = 3.3 V or 5 V, DVDD1 = DVDD2 = 3.3 V or 5 V, IOUTFS = 20 mA, unless otherwise noted.
Table 1.
AD9763
AD9765
AD9767
Parameter
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
RESOLUTION
10
12
14
Bits
DC ACCURACY1
Integral Linearity Error (INL)
1
±0.1
+1
LSB
TA = 25°C
1.5
±0.4
+1.5
3.5
±1.5
+3.5
LSB
TMIN to TMAX
2.0
+2.0
4.0
+4.0
LSB
Differential Nonlinearity (DNL)
LSB
TA = 25°C
0.5
±0.07
+0.5
0.75
±0.3
+0.75
2.5
±1.0
+2.5
LSB
TMIN to TMAX
1.0
+1.0
3.0
+3.0
LSB
ANALOG OUTPUT
Offset Error
0.02
+0.02
0.02
+0.02
0.02
+0.02
% of FSR
Gain Error Without Internal Reference
2
±0.25
+2
2
±0.25
+2
2
±0.25
+2
% of FSR
Gain Error with Internal Reference
5
±1
+5
5
±1
+5
5
±1
+5
% of FSR
Gain Match
1.6
±0.1
+1.6
1.6
±0.1
+1.6
1.6
±0.1
+1.6
% of FSR
0.14
+0.14
0.14
+0.14
0.14
+0.14
dB
Full-Scale Output Current2
2.0
20.0
2.0
20.0
2.0
20.0
mA
Output Compliance Range
1.0
+1.25
1.0
+1.25
1.0
+1.25
V
Output Resistance
100
kΩ
Output Capacitance
5
pF
REFERENCE OUTPUT
Reference Voltage
1.14
1.20
1.26
1.14
1.20
1.26
1.14
1.20
1.26
V
Reference Output Current3
100
nA
REFERENCE INPUT
Input Compliance Range
0.1
1.25
0.1
1.25
0.1
1.25
V
Reference Input Resistance
1
MΩ
Small-Signal Bandwidth
0.5
MHz
TEMPERATURE COEFFICIENTS
Offset Drift
0
ppm of FSR/°C
Gain Drift Without Internal Reference
±50
ppm of FSR/°C
Gain Drift with Internal Reference
±100
ppm of FSR/°C
Reference Voltage Drift
±50
ppm/°C
POWER SUPPLY
Supply Voltages
AVDD
3
5
5.5
3
5
5.5
3
5
5.5
V
DVDD1, DVDD2
2.7
5
5.5
2.7
5
5.5
2.7
5
5.5
V
Analog Supply Current (IAVDD)
71
75
71
75
71
75
mA
Digital Supply Current (IDVDD)4
5
7
5
7
5
7
mA
Digital Supply Current (IDVDD)5
15
mA
Supply Current Sleep Mode (IAVDD)
8
12.0
8
12.0
8
12.0
mA
Power Dissipation4 (5 V, IOUTFS = 20 mA)
380
410
380
410
380
410
mW
Power Dissipation5 (5 V, IOUTFS = 20 mA)
420
450
420
450
420
450
mW
Power Dissipation6 (5 V, IOUTFS = 20 mA)
450
mW
Power Supply Rejection Ratio7—AVDD
–0.4
+0.4
–0.4
+0.4
–0.4
+0.4
% of FSR/V
Power Supply Rejection Ratio7—DVDD
–0.025
+0.025
–0.025
+0.025
–0.025
+0.025
% of FSR/V
OPERATING RANGE
–40
+85
–40
+85
–40
+85
°C
1 Measured at IOUTA, driving a virtual ground.
2 Nominal full-scale current, IOUTFS, is 32 times the IREF current.
3 An external buffer amplifier with input bias current <100 nA should be used to drive any external load.
4 Measured at fCLK = 25 MSPS and fOUT = 1.0 MHz.
5 Measured at fCLK = 100 MSPS and fOUT = 1 MHz.
6 Measured as unbuffered voltage output with IOUTFS = 20 mA and RLOAD = 50 Ω at IOUTA and IOUTB, fCLK = 100 MSPS, and fOUT = 40 MHz.
7 ±10% power supply variation.
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