DC SPECIFICATIONS (T MIN t" />
參數(shù)資料
型號: AD9761ARSRL
廠商: Analog Devices Inc
文件頁數(shù): 12/24頁
文件大?。?/td> 0K
描述: IC DAC 10BIT DUAL 40MSPS 28-SSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1,500
設(shè)置時(shí)間: 35ns
位數(shù): 10
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 模擬和數(shù)字
功率耗散(最大): 250mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 28-SSOP
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 4 電流,單極;4 電流,雙極
采樣率(每秒): 40M
配用: AD9761-EBZ-ND - BOARD EVAL FOR AD9761
–2–
AD9761–SPECIFICATIONS
AD9761
–3–
DC SPECIFICATIONS (T
MIN to TMax, AVDD = 5 V, DVDD = 5 V, IOUTFS = 10 mA, unless otherwise noted.)
Parameter
Min
Typ
Max
Unit
RESOLUTION
10
Bits
DC ACCURACY1
Integral Nonlinearity Error (INL)
TA = 25°C
–1.75
±0.5
+1.75
LSB
TMIN to TMAX
–2.75
±0.7
+2.75
LSB
Differential Nonlinearity (DNL)
TA = 25°C
–1
±0.4
+1.25
LSB
TMIN to TMAX
–1
±0.5
+1.75
LSB
Monotonicity (10-Bit)
Guaranteed over Rated Specification Temperature Range
ANALOG OUTPUT
Offset Error
–0.05
±0.025
+0.05
% of FSR
Offset Matching between DACs
–0.10
±0.05
+0.10
% of FSR
Gain Error (without Internal Reference)
–5.5
±1.0
+5.5
% of FSR
Gain Error (with Internal Reference)
–5.5
±1.0
+5.5
% of FSR
Gain Matching between DACs
–1.0
±0.25
+1.0
% of FSR
Full-Scale Output Current2
10
mA
Output Compliance Range
–1.0
+1.25
V
Output Resistance
100
k
Output Capacitance
5
pF
REFERENCE OUTPUT
Reference Voltage
1.14
1.20
1.26
V
Reference Output Current3
100
nA
REFERENCE INPUT
Input Compliance Range
0.1
1.25
V
Reference Input Resistance
1
M
TEMPERATURE COEFFICIENTS
Unipolar Offset Drift
0
ppm/°C
Gain Drift (without Internal Reference)
±50
ppm/°C
Gain Drift (with Internal Reference)
±140
ppm/°C
Gain Matching Drift (between DACs)
±25
ppm/°C
Reference Voltage Drift
±50
ppm/°C
POWER SUPPLY
AVDD
Voltage Range
3.0
5.0
5.5
V
Analog Supply Current (IAVDD)
26
29
mA
DVDD
Voltage Range
2.7
5.0
5.5
V
Digital Supply Current at 5 V (IDVDD)4
15
18
mA
Digital Supply Current at 3 V (IDVDD)4
5
mA
Nominal Power Dissipation5
AVDD and DVDD at 3 V
93
mW
AVDD and DVDD at 5 V
200
250
mW
Power Supply Rejection Ratio (PSRR)–AVDD
–0.25
+0.25
% of FSR/V
Power Supply Rejection Ratio (PSRR)–DVDD
–0.02
+0.02
% of FSR/V
OPERATING RANGE
–40
+85
°C
NOTES
1Measured at IOUTA and QOUTA, driving a virtual ground.
2Nominal full-scale current, IOUTFS, is 16 the IREF current.
3Use an external amplifier to drive any external load.
4Measured at fCLOCK = 40 MSPS and fOUT = 1 MHz.
5Measured as unbuffered voltage output into 50 RLOAD at IOUTA, IOUTB, QOUTA, and QOUTB; fCLOCK = 40 MSPS and fOUT = 8 MHz.
Specifications subject to change without notice.
REV. C
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