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參數(shù)資料
| 型號： | AD9750ARZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 12/22頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 10BIT 125MSPS 28SOIC |
| 產(chǎn)品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 1,000 |
| 系列： | TxDAC® |
| 設置時間： | 35ns |
| 位數(shù)： | 10 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 230mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SOIC（0.295"，7.50mm 寬） |
| 供應商設備封裝： | 28-SOIC W |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 2 電流，單極；2 電流，雙極 |
| 采樣率（每秒）： | 125M |
| 配用： | AD9750-EB-ND - BOARD EVAL FOR AD9750 |
AD9750–SPECIFICATIONS
–2–
REV. 0
DC SPECIFICATIONS
Parameter
Min
Typ
Max
Units
RESOLUTION
10
Bits
DC ACCURACY
1
Integral Linearity Error (INL)
–1.0
±0.1
+1.0
LSB
Differential Nonlinearity (DNL)
–0.5
±0.1
+0.5
LSB
ANALOG OUTPUT
Offset Error
–0.02
+0.02
% of FSR
Gain Error (Without Internal Reference)
–2
±0.5
+2
% of FSR
Gain Error (With Internal Reference)
–5
±1.5
+5
% of FSR
Full-Scale Output Current
2
2.0
20.0
mA
Output Compliance Range
–1.0
1.25
V
Output Resistance
100
k
Output Capacitance
5
pF
REFERENCE OUTPUT
Reference Voltage
1.14
1.20
1.26
V
Reference Output Current3
100
nA
REFERENCE INPUT
Input Compliance Range
0.1
1.25
V
Reference Input Resistance
1
M
Small Signal Bandwidth
0.5
MHz
TEMPERATURE COEFFICIENTS
Offset Drift
0
ppm of FSR/
°C
Gain Drift (Without Internal Reference)
±50
ppm of FSR/
°C
Gain Drift (With Internal Reference)
±100
ppm of FSR/
°C
Reference Voltage Drift
±50
ppm/
°C
POWER SUPPLY
Supply Voltages
AVDD
4.5
5.0
5.5
V
DVDD
2.7
5.0
5.5
V
Analog Supply Current (IAVDD)
4
33
39
mA
Digital Supply Current (IDVDD)
5
5.0
7
mA
Supply Current Sleep Mode (IAVDD)
6
4.0
8
mA
Power Dissipation5 (5 V, IOUTFS = 20 mA)
190
230
mW
Power Supply Rejection Ratio
7—AVDD
–0.4
+0.4
% of FSR/V
Power Supply Rejection Ratio
7—DVDD
–0.025
+0.025
% of FSR/V
OPERATING RANGE
–40
+85
°C
NOTES
1Measured at IOUTA, driving a virtual ground.
2Nominal full-scale current, I
OUTFS, is 32 × the IREF current.
3Use an external buffer amplifier to drive any external load.
4Requires +5 V supply.
5Measured at f
CLOCK = 50 MSPS and IOUT = static full scale (20 mA).
6Logic level for SLEEP pin must be referenced to AVDD. Min V
IH = 3.5 V.
7
±5% Power supply variation.
Specifications subject to change without notice.
(TMIN to TMAX, AVDD = +5 V, DVDD = +5 V, IOUTFS = 20 mA, unless otherwise noted)
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| AD9750-EB | 功能描述:BOARD EVAL FOR AD9750 RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉換器 (DAC) 系列:TxDAC® 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| AD9750-EBZ | 功能描述:BOARD EVAL FOR AD9750 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉換器 (DAC) 系列:TxDAC® 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
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