The power dissipation, PD, of the AD9750 is depend" />
參數(shù)資料
型號(hào): AD9750ARUZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 5/22頁(yè)
文件大?。?/td> 0K
描述: IC DAC 10BIT 125MSPS 28TSSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 50
系列: TxDAC®
設(shè)置時(shí)間: 35ns
位數(shù): 10
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字
功率耗散(最大): 230mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 28-TSSOP
包裝: 管件
輸出數(shù)目和類型: 2 電流,單極;2 電流,雙極
采樣率(每秒): 125M
配用: AD9750-EB-ND - BOARD EVAL FOR AD9750
AD9750
–13–
REV. 0
POWER DISSIPATION
The power dissipation, PD, of the AD9750 is dependent on
several factors which include: (1) AVDD and DVDD, the
power supply voltages; (2) IOUTFS, the full-scale current output;
(3) fCLOCK, the update rate; (4) and the reconstructed digital
input waveform. The power dissipation is directly proportional
to the analog supply current, IAVDD, and the digital supply cur-
rent, IDVDD. IAVDD is directly proportional to IOUTFS as shown in
Figure 25 and is insensitive to fCLOCK.
Conversely, IDVDD is dependent on both the digital input wave-
form, fCLOCK, and digital supply DVDD. Figures 26 and 27
show IDVDD as a function of full-scale sine wave output ratios
(fOUT/fCLOCK) for various update rates with DVDD = 5 V and
DVDD = 3 V, respectively. Note, how IDVDD is reduced by more
than a factor of 2 when DVDD is reduced from 5 V to 3 V.
IOUTFS – mA
35
5
220
4
6
8
10
12
141618
30
25
20
15
10
I AVDD
mA
Figure 25. IAVDD vs. IOUTFS
RATIO (fCLOCK/fOUT)
18
16
0
0.01
1
0.1
I DVDD
mA
8
6
4
2
12
10
14
125MSPS
100MSPS
50MSPS
25MSPS
5MSPS
Figure 26. IDVDD vs. Ratio @ DVDD = 5 V
RATIO (fCLOCK/fOUT)
8
0
0.01
1
0.1
I DVDD
mA
6
4
2
125MSPS
100MSPS
50MSPS
25MSPS
5MSPS
Figure 27. IDVDD vs. Ratio @ DVDD = 3 V
APPLYING THE AD9750
OUTPUT CONFIGURATIONS
The following sections illustrate some typical output configura-
tions for the AD9750. Unless otherwise noted, it is assumed
that IOUTFS is set to a nominal 20 mA. For applications requir-
ing the optimum dynamic performance, a differential output
configuration is suggested. A differential output configuration
may consist of either an RF transformer or a differential op amp
configuration. The transformer configuration provides the opti-
mum high frequency performance and is recommended for any
application allowing for ac coupling. The differential op amp
configuration is suitable for applications requiring dc coupling, a
bipolar output, signal gain and/or level shifting.
A single-ended output is suitable for applications requiring a
unipolar voltage output. A positive unipolar output voltage will
result if IOUTA and/or IOUTB is connected to an appropri-
ately sized load resistor, RLOAD, referred to ACOM. This con-
figuration may be more suitable for a single-supply system
requiring a dc coupled, ground referred output voltage. Alterna-
tively, an amplifier could be configured as an I-V converter thus
converting IOUTA or IOUTB into a negative unipolar voltage.
This configuration provides the best dc linearity since IOUTA
or IOUTB is maintained at a virtual ground. Note, IOUTA
provides slightly better performance than IOUTB.
DIFFERENTIAL COUPLING USING A TRANSFORMER
An RF transformer can be used to perform a differential-to-
single-ended signal conversion as shown in Figure 28. A
differentially coupled transformer output provides the optimum
distortion performance for output signals whose spectral content
lies within the transformer’s passband. An RF transformer such
as the Mini-Circuits T1-1T provides excellent rejection of
common-mode distortion (i.e., even-order harmonics) and noise
over a wide frequency range. It also provides electrical isolation
and the ability to deliver twice the power to the load. Trans-
formers with different impedance ratios may also be used for
impedance matching purposes. Note that the transformer
provides ac coupling only.
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