參數(shù)資料
型號： AD9744ARURL7
廠商： Analog Devices Inc
文件頁數(shù)： 30/32頁
文件大?。?/td> 0K
描述： IC DAC 14BIT 210MSPS 28-TSSOP
產(chǎn)品培訓模塊： Data Converter Fundamentals
DAC Architectures
標準包裝： 1,000
系列： TxDAC®
設(shè)置時間： 11ns
位數(shù)： 14
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 模擬和數(shù)字
功率耗散（最大）： 145mW
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 28-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 28-TSSOP
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 2 電流，單極；2 電流，雙極
采樣率（每秒）： 210M
配用： AD9744ACP-PCBZ-ND - BOARD EVAL FOR AD9744ACP
Data Sheet
AD9744
Rev. C | Page 7 of 32
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 3. 28-Lead SOIC and TSSOP
Figure 4. 32-Lead LFCSP
Table 6. Pin Function Descriptions
SOIC/TSSOP
Pin No.
LFCSP
Pin No.
Mnemonic
Description
1
27
DB13
Most Significant Data Bit (MSB).
2 to 13
28 to 32,
1, 2, 4 to 8
DB12 to
DB1
Data Bits 12 to 1.
14
9
DB0
Least Significant Data Bit (LSB).
15
25
SLEEP
Power-Down Control Input. Active high. Contains active pull-down circuit; it may be left
unterminated if not used.
16
N/A
REFLO
Reference Ground when Internal 1.2 V Reference Used. Connect to ACOM for both internal
and external reference operation modes.
17
23
REFIO
Reference Input/Output. Serves as reference input when using external reference. Serves as
1.2 V reference output when using internal reference. Requires 0.1 F capacitor to ACOM
when using internal reference.
18
24
FS ADJ
Full-Scale Current Output Adjust.
19
N/A
NC
No Internal Connection.
20
19, 22
ACOM
Analog Common.
21
20
IOUTB
Complementary DAC Current Output. Full-scale current when all data bits are 0s.
22
21
IOUTA
DAC Current Output. Full-scale current when all data bits are 1s.
23
N/A
RESERVED
Reserved. Do not connect to common or supply.
24
17, 18
AVDD
Analog Supply Voltage (3.3 V).
25
16
MODE
Selects Input Data Format. Connect to DCOM for straight binary, DVDD for twos complement.
N/A
15
CMODE
Clock Mode Selection. Connect to CLKCOM for single-ended clock receiver (drive CLK+ and
float CLK). Connect to CLKVDD for differential receiver. Float for PECL receiver (terminations
on-chip).
26
10, 26
DCOM
Digital Common.
27
3
DVDD
Digital Supply Voltage (3.3 V).
28
N/A
CLOCK
Clock Input. Data latched on positive edge of clock.
N/A
12
CLK+
Differential Clock Input.
N/A
13
CLK
Differential Clock Input.
N/A
11
CLKVDD
Clock Supply Voltage (3.3 V).
N/A
14
CLKCOM
Clock Common.
N/A
EPAD
Exposed Pad. Connect the exposed pad thermally to a copper ground plane for enhanced
electrical and thermal performance.
14
13
12
11
17
16
15
20
19
18
10
9
8
1
2
3
4
7
6
5
28
27
26
25
24
23
22
21
NC = NO CONNECT
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
(LSB) DB0
CLOCK
DVDD
DCOM
MODE
AVDD
RESERVED
IOUTA
IOUTB
ACOM
NC
FS ADJ
REFIO
REFLO
SLEEP
DB10
DB11
DB12
(MSB) DB13
02913-003
AD9744
TOP VIEW
(Not to Scale)
FS ADJ
REFIO
ACOM
IOUTA
DB7
NOTES
1. CONNECT THE EXPOSED PAD THERMALLY TO A COPPER GROUND PLANE
FOR ENHANCED ELECTRICAL AND THERMAL PERFORMANCE.
DB6
DVDD
IOUTB
ACOM
AVDD
DB5
DB4
DB3
DB2
DB1
(L
S
B)
DB0
DCO
M
CL
KV
DD
CL
K+
CL
K–
CL
KCO
M
CM
O
DE
M
O
DE
DB8
DB9
DB10
DB11
DB13
(
M
S
B)
DCO
M
SL
EEP
DB12
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
1
12
13
14
15
16
32
31
30
29
28
27
26
25
AD9744
TOP VIEW
(Not to Scale)
02913-
004
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參數(shù)描述
AD9744ARUZ 功能描述:IC DAC 14BIT 210MSPS 28-TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC® 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:50 系列:- 設(shè)置時間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF)
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