TMIN to T
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� AD9742AR
寤犲晢锛� Analog Devices Inc
鏂囦欢闋佹暩(sh霉)锛� 23/32闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC DAC 12BIT 210MSPS 28-SOIC
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� Data Converter Fundamentals
DAC Architectures
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 27
绯诲垪锛� TxDAC®
瑷�(sh猫)缃檪闁擄細 11ns
浣嶆暩(sh霉)锛� 12
鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� 骞惰伅(li谩n)
杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩細 1
闆诲闆绘簮锛� 妯℃摤鍜屾暩(sh霉)瀛�
鍔熺巼鑰楁暎锛堟渶澶э級锛� 145mW
宸ヤ綔婧害锛� -40°C ~ 85°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 28-SOIC锛�0.295"锛�7.50mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 28-SOIC W
鍖呰锛� 绠′欢
杓稿嚭鏁�(sh霉)鐩拰椤炲瀷锛� 2 闆绘祦锛屽柈妤碉紱2 闆绘祦锛岄洐妤�
閲囨ǎ鐜囷紙姣忕锛夛細 210M
閰嶇敤锛� AD9742ACP-PCBZ-ND - BOARD EVAL FOR AD9742ACP
Data Sheet
AD9742
Rev. C | Page 3 of 32
SPECIFICATIONS
DC SPECIFICATIONS
TMIN to TMAX, AVDD = 3.3 V, DVDD = 3.3 V, CLKVDD = 3.3 V, IOUTFS = 20 mA, unless otherwise noted.
Table 1.
Parameter
Min
Typ
Max
Unit
RESOLUTION
12
Bits
DC ACCURACY1
Integral Linearity Error (INL)
2.5
卤0.5
+2.5
LSB
Differential Nonlinearity (DNL)
1.3
卤0.4
+1.3
LSB
ANALOG OUTPUT
Offset Error
0.02
+0.02
% of FSR
Gain Error (Without Internal Reference)
0.5
卤0.1
+0.5
% of FSR
Gain Error (With Internal Reference)
0.5
卤0.1
+0.5
% of FSR
Full-Scale Output Current2
2
20
mA
Output Compliance Range
1
+1.25
V
Output Resistance
100
k
Output Capacitance
5
pF
REFERENCE OUTPUT
Reference Voltage
1.14
1.20
1.26
V
Reference Output Current3
100
nA
REFERENCE INPUT
Input Compliance Range
0.1
1.25
V
Reference Input Resistance (Ext. Reference)
1
M
Small Signal Bandwidth
0.5
MHz
TEMPERATURE COEFFICIENTS
Offset Drift
0
ppm of FSR/掳C
Gain Drift (Without Internal Reference)
卤50
ppm of FSR/掳C
Gain Drift (With Internal Reference)
卤100
ppm of FSR/掳C
Reference Voltage Drift
卤50
ppm/掳C
POWER SUPPLY
Supply Voltages
AVDD
2.7
3.3
3.6
V
DVDD
2.7
3.3
3.6
V
CLKVDD
2.7
3.3
3.6
V
Analog Supply Current (IAVDD)
33
36
mA
Digital Supply Current (IDVDD)4
8
9
mA
Clock Supply Current (ICLKVDD)
5
6
mA
Supply Current Sleep Mode (IAVDD)
5
6
mA
Power Dissipation4
135
145
mW
Power Dissipation5
145
mW
Power Supply Rejection Ratio鈥擜VDD6
1
+1
% of FSR/V
Power Supply Rejection Ratio鈥擠VDD6
0.04
+0.04
% of FSR/V
OPERATING RANGE
40
+85
掳C
1
Measured at IOUTA, driving a virtual ground.
2
Nominal full-scale current, IOUTFS, is 32 times the IREF current.
3
An external buffer amplifier with input bias current <100 nA should be used to drive any external load.
4
Measured at fCLOCK = 25 MSPS and fOUT = 1 MHz.
5
Measured as unbuffered voltage output with IOUTFS = 20 mA and 50 RLOAD at IOUTA and IOUTB, fCLOCK = 100 MSPS and fOUT = 40 MHz.
6
卤5% power supply variation.
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
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鍙冩暩(sh霉)鎻忚堪
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