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參數(shù)資料
| 型號： | AD9732BRS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | 10-Bit, 200 MSPS D/A Converter |
| 中文描述： | PARALLEL, WORD INPUT LOADING, 0.005 us SETTLING TIME, 10-BIT DAC, PDSO28 |
| 封裝： | SSOP-28 |
| 文件頁數(shù)： | 7/11頁 |
| 文件大?。?/td> | 144K |
| 代理商： | AD9732BRS |
AD9732
–7–
REV. A
L
0.4
–0.6
–0.4
–0.2
0
0.2
0.6
Figure 8. Typical Integral Nonlinearity Performance (INL)
0
–60
–100
START 0Hz
STOP 62.5MHz
6.25MHz/
–10
–50
–70
–90
–30
–40
–80
–20
ENCODE = 125MHz
A
= 2MHz
SPAN = 62.5MHz
SFDR = 66dB
1
1
Figure 9. Wideband SFDR 2 MHz A
OUT
; 125 MHz Clock
0
–60
–100
START 0Hz
STOP 62.5MHz
6.25MHz/
–10
–50
–70
–90
–30
–40
–80
–20
ENCODE = 125MHz
A
= 10MHz
SPAN = 62.5MHz
SFDR = 63dB
1
1
Figure 10. Wideband SFDR 10 MHz A
OUT
; 125 MHz Clock
0
–60
–100
START 0Hz
STOP 62.5MHz
6.25MHz/
–10
–50
–70
–90
–30
–40
–80
–20
ENCODE = 125MHz
A
= 20MHz
SPAN = 62.5MHz
SFDR = 57dB
1
1
Figure 11. Wideband SFDR 20 MHz A
OUT
; 125 MHz Clock
0
–60
–100
START 0Hz
STOP 62.5MHz
6.25MHz/
–10
–50
–70
–90
–30
–40
–80
–20
ENCODE = 125MHz
A
= 40MHz
SPAN = 62.5MHz
SFDR = 52dB
1
1
Figure 12. Wideband SFDR 40 MHz A
OUT
; 125 MHz Clock
0
–60
–100
START 0Hz
STOP 100MHz
10MHz/
–10
–50
–70
–90
–30
–40
–80
–20
ENCODE = 200MHz
A
= 40MHz
SPAN = 100MHz
SFDR = 54dB
1
1
Figure 13. Wideband SFDR 40 MHz A
OUT
; 200 MHz Clock
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