參數(shù)資料
型號: AD9732
廠商: Analog Devices, Inc.
英文描述: 10-Bit, 200 MSPS D/A Converter
中文描述: 10位,200 MSPS的D / A轉(zhuǎn)換
文件頁數(shù): 3/11頁
文件大小: 144K
代理商: AD9732
–3–
REV. A
AD9732
Test
Level
AD9732BRS
Min
Parameter
SFDR PERFORMANCE (Wideband)
15
2 MHz A
OUT
10 MHz A
OUT
20 MHz A
OUT
40 MHz A
OUT
2 MHz A
OUT
(Clock = 165 MHz)
10 MHz A
OUT
(Clock = 165 MHz)
20 MHz A
OUT
(Clock = 165 MHz)
40 MHz A
OUT
(Clock = 165 MHz)
65 MHz A
OUT
(Clock = 165 MHz)
65 MHz A
OUT
(Clock = 200 MHz)
80 MHz A
OUT
(Clock = 200 MHz)
SFDR PERFORMANCE (Narrowband)
15
2 MHz; 2 MHz Span
25 MHz; 2 MHz Span
10 MHz; 5 MHz Span (Clock = 200 MHz)
Temp
Typ
Max
Units
+25
°
C
+25
°
C
+25
°
C
+25
°
C
+25
°
C
+25
°
C
+25
°
C
+25
°
C
+25
°
C
+25
°
C
+25
°
C
V
V
V
V
V
V
V
V
V
V
V
66
63
57
52
63
62
56
51
48
45
43
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
+25
°
C
+25
°
C
+25
°
C
V
V
V
77
65
70
dB
dB
dB
INTERMODULATION DISTORTION
16
F1 = 800 kHz, F2 = 900 kHz to Nyquist
F1 = 800 kHz, F2 = 900 kHz, Narrowband
(2 MHz)
+25
°
C
V
69
dB
+25
°
C
V
61
dB
NOTES
1
Measured as an error in ratio of full-scale current to current through R
(640
μ
A nominal); ratio is nominally 32. DAC load is virtual ground.
2
Internal reference voltage is tested under load conditions specified in Internal Reference Output Current specification.
3
Internal reference output current defines load conditions applied during Internal Reference Voltage test.
4
Full-scale current variations among devices are higher when driving REFERENCE IN directly.
5
Frequency at which a 3 dB change in output of DAC is observed; R
= 50
; 100 mV modulation at midscale.
6
Based on I
= 32 ([CONTROL AMP IN – (+V
)]/R
) when using internal control amplifier. DAC load is virtual ground.
7
Measured as voltage settling at midscale transition to 0.1%; R
= 50
.
8
Measured from 50% point of rising edge of CLOCK signal to 1/2 LSB change in output signal.
9
Peak glitch impulse is measured as the largest area under a single positive or negative transient.
10
Measured with R
= 50
and DAC operating in latched mode.
11
Data must remain stable for a specified time prior to rising edge of CLOCK.
12
Data must remain stable for a specified time after rising edge of CLOCK.
13
Supply voltages should remain stable with
±
5% for nominal operation.
14
Power dissipation calculation includes current through a 50
load.
15
SFDR is defined as the difference in signal energy between the full-scale fundamental signal and worst case spurious frequencies in the output spectrum window.
The frequency span dc to Nyquist unless otherwise noted.
16
Intermodulation distortion is the measure of the sum and difference products produced when a two-tone input is driven into the DAC. The distortion products
created will manifest themselves at sum and difference frequencies of the two tones.
Specifications subject to change without notice.
EXPLANATION OF TEST LEVELS
Test Level
I
100% production tested.
II
100% production tested at +25
°
C and sample tested at
specified temperatures.
III Sample tested only.
IV Parameter is guaranteed by design and characterization
testing.
V
Parameter is a typical value only.
VI 100% production tested at +25
°
C; guaranteed by design
and characterization testing for industrial temperature
range.
ORDERING GUIDE
Temperature
Range
–40
°
C to +85
°
C
+25
°
C
Package
Description
Package
Option
Model
AD9732BRS
AD9732/PCB
28-Lead Small Outline (SSOP)
Evaluation Board
RS-28
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9732/PCB 制造商:AD 制造商全稱:Analog Devices 功能描述:10-Bit, 200 MSPS D/A Converter
AD9732BRS 制造商:Rochester Electronics LLC 功能描述:10 BIT 200 MSPS CMOS DAC - Bulk
AD9734 制造商:AD 制造商全稱:Analog Devices 功能描述:14/12/10-Bit, 1200 MSPS D/A Converters
AD9734_06 制造商:AD 制造商全稱:Analog Devices 功能描述:10-/12-/14-Bit, 1200 MSPS DACS
AD9734BBC 制造商:Analog Devices 功能描述: 制造商:Rochester Electronics LLC 功能描述:- Bulk