參數(shù)資料
型號(hào)： AD9715BCPZ
廠商： Analog Devices Inc
文件頁數(shù)： 43/80頁
文件大小： 0K
描述： IC DAC DUAL 10BIT LO PWR 40LFCSP
產(chǎn)品培訓(xùn)模塊： Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝： 1
系列： TxDAC®
位數(shù)： 10
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 2
電壓電源： 模擬和數(shù)字
功率耗散（最大）： 86mW
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 40-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 40-LFCSP-VQ（6x6）
包裝： 托盤
輸出數(shù)目和類型： 4 電流，單極
采樣率（每秒）： 125M
產(chǎn)品目錄頁面： 785 (CN2011-ZH PDF)
AD9714/AD9715/AD9716/AD9717
Rev. A | Page 48 of 80
APPLICATIONS INFORMATION
OUTPUT CONFIGURATIONS
The following sections illustrate some typical output confi-
gurations for the AD9714/AD9715/AD9716/AD9717. Unless
otherwise noted, it is assumed that IxOUTFS is set to a nominal
2 mA. For applications requiring the optimum dynamic perfor-
mance, a differential output configuration is suggested. A
differential output configuration can consist of either an
RF transformer or a differential op amp configuration. The
transformer configuration provides the optimum high fre-
quency performance and is recommended for any application
that allows ac coupling. The differential op amp configuration
is suitable for applications requiring dc coupling, signal gain,
and/or a low output impedance.
A single-ended output is suitable for applications in which low
cost and low power consumption are primary concerns.
DIFFERENTIAL COUPLING USING A TRANSFORMER
An RF transformer can be used to perform a differential-to-
single-ended signal conversion, as shown in Figure 103. The
distortion performance of a transformer typically exceeds
that available from standard op amps, particularly at higher
frequencies. Transformer coupling provides excellent rejection
of common-mode distortion (that is, even-order harmonics)
over a wide frequency range. It also provides electrical isolation
and can deliver voltage gain without adding noise. Transformers
with different impedance ratios can also be used for impedance
matching purposes. The main disadvantages of transformer
coupling are low frequency roll-off, lack-of-power gain, and
high output impedance.
AD9714/AD9715/
AD9716/AD9717
IOUTN
IOUTP
29
28
OPTIONAL RDIFF
RLOAD
07
26
5-
0
59
Figure 103. Differential Output Using a Transformer
The center tap on the primary side of the transformer must be
connected to a voltage that keeps the voltages on IOUTP and
IOUTN within the output common-mode voltage range of the
device. Note that the dc component of the DAC output current
is equal to IxOUTFS and flows out of both IOUTP and IOUTN.
The center tap of the transformer should provide a path for
this dc current. In most applications, AGND provides the most
convenient voltage for the transformer center tap. The complemen-
tary voltages appearing at IOUTP and IOUTN (that is, VIOUTP
and VIOUTN) swing symmetrically around AGND and should be
maintained with the specified output compliance range of the
AD9714/AD9715/AD9716/AD9717.
A differential resistor, RDIFF, can be inserted in applications
where the output of the transformer is connected to the load,
RLOAD, via a passive reconstruction filter or cable. RDIFF, as
reflected by the transformer, is chosen to provide a source
termination that results in a low voltage standing wave ratio
(VSWR). Note that approximately half the signal power is
dissipated across RDIFF.
SINGLE-ENDED BUFFERED OUTPUT USING
AN OP AMP
An op amp such as the ADA4899-1 can be used to perform
a single-ended current-to-voltage conversion, as shown in
Figure 104. The AD9714/AD9715/AD9716/AD9717 are config-
ured with a pair of series resistors, RS, off each output. For best
distortion performance, RS should be set to 0 Ω. The feedback
resistor, RFB, determines the peak-to-peak signal swing by the
formula
VOUT = RFB × IFS
The common-mode voltage of the output is determined by the
formula
2
1
FS
FB
B
FB
REF
CM
I
R
V
The maximum and minimum voltages out of the amplifier are,
respectively,
B
FB
REF
MAX
R
V
1
VMIN = VMAX – IFS × RFB
+5V
AD9714/AD9715/
AD9716/AD9717
IOUTP
IOUTN 29
RFB
VOUT
REFIO 34
28
RS
AVSS 25
CF
C
RS
RB
07
26
5-
06
0
+
–
ADA4899-1
–5V
Figure 104. Single-Supply Single-Ended Buffer
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