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參數(shù)資料
| 型號： | AD9713B |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 12-Bit, 100 MSPS D/A Converters(100MSPS12位D/A轉換器) |
| 中文描述： | 12位，100 MSPS的D / A轉換（100MSPS12位的D / A轉換器） |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 338K |
| 代理商： | AD9713B |
AD9712B/AD9713B
REV. B
–4–
PIN DE SCRIPT IONS
Pin #
Name
Function
1–10
11
D
2
–D
11
D
12
(LSB)
T en bits of twelve-bit digital input word.
Least Significant Bit (LSB) of digital input word.
Input Coding vs. Current Output
Input Code D
1
–D
12
1111111111
0000000000
One of two negative digital supply pins; nominally –5.2 V.
Analog ground return. T his point and the reference side of the DAC load resistors should be
connected to the same potential (nominally ground).
Analog current output; full-scale output occurs with digital inputs at all “1.”
One of two negative analog supply pins; nominally –5.2 V.
Complementary analog current output; zero scale output occurs with digital inputs at all “1.”
Normally connected to CONT ROL AMP OUT (Pin 18). Direct line to DAC current source
network. Voltage changes at this point have a direct effect on the full-scale output value of
unit. Full-scale current output = 128 (Reference voltage/R
SET
) when using internal amplifier.
Normally connected to REFERENCE INPUT (Pin 17). Output of internal control amplifier,
which provides a temperature-compensated drive level to the current switch network.
Normally connected to REFERENCE OUT (Pin 20) if not connected to external reference.
Normally connected to CONT ROL AMP IN (Pin 19). Internal voltage reference, nominally
–1.18 V.
One of two negative digital supply pins; nominally –5.2 V.
Ground return for the internal voltage reference and amplifier.
Positive digital supply pin, used only on the AD9713B; nominally +5 V. No connection to this
pin on AD9712B.
Connection for external resistance reference. Full-scale current out = 128 (Reference voltage/
R
SET
) when using internal amplifier. Nominally 7.5 k
.
One of two negative analog supply pins; nominally –5.2 V.
T ransparent latch control line. Register is transparent when LAT CH ENABLE is LOW.
Digital ground return.
Most Significant Bit (MSB) of digital input word.
I
OUT
(mA)
–20.475
0
I
OUT
(mA)
0
–20.475
12
13
DIGIT AL –V
S
ANALOG RET URN
14
15
16
17
I
OUT
ANALOG –V
S
I
OUT
REFERENCE IN
18
CONT ROL AMP OUT
19
20
CONT ROL AMP IN
REFERENCE OUT
21
22
23
DIGIT AL –V
S
REFERENCE GROUND
DIGIT AL +V
S
24
R
SET
25
26
27
28
ANALOG –V
S
LAT CH ENABLE
DIGIT AL GROUND
D
1
(MSB)
PIN CONFIGURAT IONS
PLCC/LCC
ANALOG –V
S
R
SET
DIGITAL +V
S
REFERENCE
GROUND
DIGITAL –V
S
REFERENCE
OUT
CONTROL
AMP IN
D
1
D
G
D
6
D
9
D
8
D
7
D
11
D
10
A
R
D
S
A
S
I
O
R
C
A
AD9712B
AD9713B
D
5
D
3
D
2
L
E
(Not to Scale)
TOP VIEW
5
6
7
8
9
10
11
28
27
26
1
2
3
4
25
24
23
22
21
20
19
12
13
14
15
16
17
18
D (LSB)
D
4
I
O
DIP
D
6
D
9
D
8
D
7
D
11
D
10
D
12
(LSB)
D
5
D
3
D
4
D
2
ANALOG RETURN
I
OUT
DIGITAL –V
S
D
1
(MSB0)
DIGITAL GROUND
LATCH ENABLE
R
SET
REFERENCE GROUND
REFERENCE OUT
CONTROL AMP IN
IOUT
REFERENCE IN
CONTROL AMP OUT
ANALOG –V
S
DIGITAL +V
S
DIGITAL –V
S
ANALOG –V
S
1
2
3
7
28
27
26
22
8
9
10
21
20
19
11
12
18
17
4
5
25
24
6
23
TOP VIEW
(Not to Scale)
13
14
16
15
AD9712B
AD9713B
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