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參數(shù)資料
| 型號： | AD9696 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Ultrafast TTL Comparators |
| 中文描述： | 超快的TTL比較 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大小： | 135K |
| 代理商： | AD9696 |
REV. B
–2–
AD9696/AD9698–SPECIFICATIONS
ABSOLUT E MAX IMUM RAT INGS
1
Supply Voltage (+V
S
/–V
S
) . . . . . . . . . . . . . . . . . . . .+7 V/–7 V
Input Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
5 V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . 5.4 V
Latch Enable Voltage . . . . . . . . . . . . . . . . . . . . . –0.5 V to +V
S
Output Current (Continuous) . . . . . . . . . . . . . . . . . . . 20 mA
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . 600 mW
Operating T emperature Range
2
AD9696/AD9698K N/K Q/K R . . . . . . . . . . . . 0
°
C to +70
°
C
AD9696/AD9698T Q . . . . . . . . . . . . . . . . –55
°
C to +125
°
C
Storage T emperature Range . . . . . . . . . . . . –65
°
C to +150
°
C
Junction T emperature
K Q/T Q Suffixes . . . . . . . . . . . . . . . . . . . . . . . . . . . +175
°
C
K N/K R Suffixes . . . . . . . . . . . . . . . . . . . . . . . . . . . +150
°
C
Lead Soldering T emperature (10 sec) . . . . . . . . . . . . +300
°
C
(Supply Voltages = –5.2 V and +5.0 V; load as specified in Note 4,
unless otherwse noted)
ELECTRICAL CHARACTERISTICS
0
8
C to +70
8
C
AD9696/AD9698
KN/KQ/KR
Min
T yp
–55
8
C to +125
8
C
AD9696/AD9698
T Q
Min
T yp
T est
Level
Parameter
T emp
Max
Max
Units
INPUT CHARACT ERIST ICS
Input Offset Voltage
4
+25
°
C
Full
Full
+25
°
C
Full
+25
°
C
Full
+25
°
C
I
VI
V
I
VI
I
VI
V
1.0
2.0
3.0
1.0
2.0
3.0
mV
mV
μ
V/
°
C
μ
A
μ
A
μ
A
μ
A
pF
Input Offset Voltage Drift
Input Bias Current
10
16
10
16
55
110
1.0
1.3
55
110
1.0
1.3
Input Offset Current
0.4
0.4
Input Capacitance
Input Voltage Range
±
5.0 V
+5.0 V
Common Mode Rejection Ratio
±
5.0 V
+5.0 V
LAT CH ENABLE INPUT
Logic “1” Voltage T hreshold
Logic “0” Voltage T hreshold
Logic “1” Current
Logic “0” Current
DIGIT AL OUT PUT S
Logic “1” Voltage (Source 4 mA)
Logic “0” Voltage (Sink 10 mA)
SWIT CHING PERFORMANCE
Propagation Delay (t
PD
)
5
Input to Output HIGH
Input to Output LOW
Latch Enable to Output HIGH
Latch Enable to Output LOW
Delta Delay Between Outputs
Propagation Delay Dispersion
20 mV to 100 mV Overdrive
100 mV to 1.0 V Overdrive
Rise T ime
10
Fall T ime
10
Latch Enable
Pulse Width [t
PW(E)
]
Setup T ime (t
S
)
Hold T ime (t
H
)
3
3
Full
Full
VI
VI
–2.2
+1.4
+3.7
+3.7
–2.2
+1.4
+3 7
+3.7
V
V
Full
Full
VI
VI
80
57
85
63
80
57
85
63
dB
dB
Full
Full
Full
Full
VI
VI
VI
VI
2.0
2.0
V
V
μ
A
μ
A
0.8
10
1
0.8
10
1
Full
Full
VI
VI
2.7
3.5
0.4
2.7
3.5
0.4
V
V
0.5
0.5
Full
Full
+25
°
C
+25
°
C
+25
°
C
IV
IV
IV
IV
IV
4.5
4.5
6.5
6.5
0.5
7.0
7.0
8.5
8.5
1.5
4.5
4.5
6.5
6.5
0.5
7.0
7.0
8.5
8.5
1.5
ns
ns
ns
ns
ns
+25
°
C
+25
°
C
+25
°
C
+25
°
C
V
IV
V
V
100
100
1.85
1.35
100
100
1.85
1.35
ps
ps
ns
ns
200
200
+25
°
C
+25
°
C
+25
°
C
IV
IV
IV
3.5
3
3
2.5
1.7
1.9
3.5
3
3
2.5
1.7
1.9
ns
ns
ns
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|---|---|
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| AD9696KR | Ultrafast TTL Comparators |
| AD9698 | Ultrafast TTL Comparators |
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