參數(shù)資料
型號(hào): AD9613BCPZRL7-170
廠商: Analog Devices Inc
文件頁(yè)數(shù): 23/36頁(yè)
文件大?。?/td> 0K
描述: IC ADC 12BIT SRL 170MSPS 64LFCSP
標(biāo)準(zhǔn)包裝: 750
位數(shù): 12
采樣率(每秒): 170M
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 738mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤(pán),CSP
供應(yīng)商設(shè)備封裝: 64-LFCSP-VQ(9x9)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 個(gè)差分,雙極
Data Sheet
AD9613
Rev. C | Page 3 of 36
SPECIFICATIONS
ADC DC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = 1.0 dBFS differential input, 1.75 V p-p full scale input range, DCS enabled,
unless otherwise noted.
Table 1.
AD9613-170
AD9613-210
AD9613-250
Parameter
Temp
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
RESOLUTION
Full
12
Bits
ACCURACY
No Missing Codes
Full
Guaranteed
Offset Error
Full
±10
mV
Gain Error
Full
+2/6
+3/5
±4
%FSR
Differential Nonlinearity (DNL)
Full
±0.5
LSB
25°C
±0.25
LSB
Integral Nonlinearity (INL)1
Full
±0.5
±0.6
±0.8
LSB
25°C
±0.20
±0.25
±0.28
LSB
MATCHING CHARACTERISTIC
Offset Error
Full
±13
mV
Gain Error
Full
±2.5
+3.5/2
+3.5/2.5
%FSR
TEMPERATURE DRIFT
Offset Error
Full
±5
ppm/°C
Gain Error
Full
±70
±80
±100
ppm/°C
INPUT-REFERRED NOISE
VREF = 1.75 V
25°C
0.39
LSB rms
ANALOG INPUT
Input Span
Full
1.75
V p-p
Input Capacitance2
Full
2.5
pF
Input Resistance3
Full
20
k
Input Common-Mode Voltage
Full
0.9
V
POWER SUPPLIES
Supply Voltage
AVDD
Full
1.7
1.8
1.9
1.7
1.8
1.9
1.7
1.8
1.9
V
DRVDD
Full
1.7
1.8
1.9
1.7
1.8
1.9
1.7
1.8
1.9
V
Supply Current
IAVDD1
Full
230
250
241
265
252
275
mA
IDRVDD1
Full
142
160
159
185
176
210
mA
POWER CONSUMPTION
SineWave Input1 (DRVDD = 1.8V)
Full
670
738
720
810
770
873
mW
Standby Power4
Full
90
mW
Power-Down Power
Full
10
mW
1
Measured with a low input frequency, full-scale sine wave.
2
Input capacitance refers to the effective capacitance between one differential input pin and its complement.
3
Input resistance refers to the effective resistance between one differential input pin and its complement.
4
Standby power is measured with a dc input and the CLK± pin inactive (that is, set to AVDD or AGND).
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