參數(shù)資料
型號(hào)： AD9430BSV-170
廠商： ANALOG DEVICES INC
元件分類(lèi)： ADC
英文描述： 12-Bit, 170 MSPS 3.3V A/D Converter
中文描述： 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100
封裝： PLASTIC, MS-026-AED, TQFP-100
文件頁(yè)數(shù)： 2/20頁(yè)
文件大?。?/td> 1594K
代理商： AD9430BSV-170
PRELIMINARY TECHNICAL DATA
AD9430
DC SPECIFICATIONS
(A
V
DD
= DrV
DD
= 3.3V; T
MIN
= -40
°
C, T
MAX
= +85
°
C, Fin = -0.5dBFS, 1.235V External
reference, LVDS Output Mode
)
Parameter
Temp
Level
RESOLUTION
ACCURACY
No Missing Codes
Offset Error
Gain Error
Differential Nonlinearity (DNL)
Integral Nonlinearity (INL)
25
°
C
TEMPERATURE DRIFT
Offset Error
Gain Error
Full
V
POWER SUPPLY REJECTION
Full
V
REFERENCE OUT (V
REF
)
Full
V
ANALOG INPUTS (AIN,
AIN
)
Input Voltage Range (AIN–
AIN
)
1
Input Common Mode Voltage
Input Resistance
Input Capacitance
Full
V
POWER SUPPLY
Supply Voltages
A
V
DD
DrV
DD
Supply Current
I
ANALOG
(
A
V
DD
= 3.3V)
2
I
DIGITAL
(DrVDD = 3.3V)
2
Full
V
POWER CONSUMPTION
3
Full
V
1
Nominal Differential Full Scale = .766 V * 2 = 1.53 V
p-p differential
for S5 = 0; Nominal Differential Full Scale = .766 V
p-p differential
for S5 = 1 (see Fig. X)
2 I
AVDD
and I
DrVDD
are measured with an analog input of 10.3MHz, -0.5dBFs, sine wave, rated Encode rate and in LVDS output mode. See Typical Performance
Characteristics and Applications section for I
DrVDD
. 3 Power Consumption is measured with a DC input at rated Encode rate in LVDS output mode
DIGITAL SPECIFICATIONS
(
A
V
DD
= 3.3V, DrV
DD
= 3.3V; T
MIN
= -40
°
C, T
MAX
= +85
°
C
)
Parameter (Conditions)
Temp
Level
Min Typ Max
ENCODE AND DATA SYNC
INPUTS (ENC,
ENC
, DS, DS/ )
Differential Input Voltage
1
Encode Common Mode Voltage
Input Resistance
Input Capacitance
LOGIC INPUTS ( S1,S2,S4,S5 )
Logic ‘1’ Voltage
Logic ‘0’ Voltage
Input Resistance
Input Capacitance
Full
IV
LOGIC OUTPUTS (Demux Mode)
Logic “1” Voltage
2
Logic “0” Voltage
2
LOGIC OUTPUTS (LVDS Mode)
2,3
V
OD
Differential Output Voltage
V
OS
Output Offset Voltage
Output Coding
Full
IV
Two’s Comp or Binary
NOTES
1
All AC specifications tested by driving ENCODE and ENCODE differentially | ENCODE - ENCODE
| >
200mV
2
Digital Output Logic Levels:
DrV
DD
= 3.3V
, C
LOAD
= 5pF.
-2- 4/01/2002 REV. PrG
Test
AD9430BSV-170
Min Typ Max
12
Guaranteed
tbd
tbd
+/- .3
+/- .5
tbd
tbd
±
tbd
1.235
± .
768
2.8
3
5
3.0 3.3 3.6
3.0 3.3 3.6
335
55
1.29
Units
Bits
mV
% FS
LSB
LSB
ppm/
°
C
ppm/
°
C
mV/V
V
V
V
k
pF
V
V
mA
mA
W
Full
25
°
C
25
°
C
25
°
C
I
I
I
I
I
V
Full
Full
Full
Full
V
V
V
Full
Full
Full
V
V
V
Test
AD9430BSV-170
Units
V
V
k
pF
V
V
k
pF
V
V
mV
V
Full
Full
Full
Full
Full
Full
Full
IV
IV
IV
IV
IV
IV
IV
0.2
1.5
5.5
4
2.0
.8
30
4
Full
Full
Full
Full
IV
IV
IV
IV
DrV
DD
-0.05
0.05
247 454
1.125 1.375
3
LVDS Rl=100 ohms, LVDS Output Swing Set Resistor = 3.7K
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參數(shù)描述
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