參數(shù)資料
型號(hào): AD9286BCPZ-500
廠商: Analog Devices Inc
文件頁(yè)數(shù): 24/28頁(yè)
文件大?。?/td> 0K
描述: IC ADC 8BIT SPI/SRL 500M 48LFSCP
標(biāo)準(zhǔn)包裝: 1
位數(shù): 8
采樣率(每秒): 500M
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 330mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 48-VFQFN 裸露焊盤(pán),CSP
供應(yīng)商設(shè)備封裝: 48-LFCSP-VQ(7x7)
包裝: 托盤(pán)
輸入數(shù)目和類(lèi)型: 2 個(gè)差分,雙極
Data Sheet
AD9286
Rev. B | Page 5 of 28
DIGITAL SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, 1.0 V internal ADC reference, AIN = 5 MHz, full temperature, unless otherwise noted.
Table 3.
Parameter1
Temperature
Min
Typ
Max
Unit
CLOCK INPUTS (CLK+, CLK, AUXCLK+, AUXCLK)
Logic Compliance
LVDS/PECL
Internal Common-Mode Bias
Full
1.2
V
Differential Input Voltage2
Full
0.2
6
V p-p
Input Voltage Range
Full
AVDD 0.3
AVDD + 1.6
V
High Level Input Voltage
Full
1.2
3.6
V
Low Level Input Voltage
Full
0
0.8
V
High Level Input Current
Full
10
+10
μA
Low Level Input Current
Full
10
+10
μA
Input Resistance (Differential)
25°C
20
Input Capacitance
25°C
4
pF
LOGIC INPUTS
CSB
High Level Input Voltage
Full
1.2
DRVDD + 0.3
V
Low Level Input Voltage
Full
0
0.8
V
High Level Input Current
Full
5
0.4
+5
μA
Low Level Input Current
Full
80
63
50
μA
Input Resistance
25°C
30
Input Capacitance
25°C
2
pF
SCLK, SDIO/PWDN, AUXCLKEN, OE
High Level Input Voltage
Full
1.2
DRVDD + 0.3
V
Low Level Input Voltage
Full
0
0.8
V
High Level Input Current
Full
50
57
70
μA
Low Level Input Current
Full
5
0.4
+5
μA
Input Resistance
25°C
30
Input Capacitance
25°C
2
pF
DIGITAL OUTPUTS (D7+, D7 to D0+, D0), LVDS
DRVDD = 1.8 V
Differential Output Voltage (VOD)
Full
290
345
400
mV
Output Offset Voltage (VOS)
Full
1.15
1.25
1.35
V
Output Coding (Default)
Offset binary
1
See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions and an explanation of how these tests were
completed.
2
Specified for LVDS and LVPECL only.
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