參數(shù)資料
型號(hào): AD9273BSVZ-25
廠商: Analog Devices Inc
文件頁(yè)數(shù): 21/48頁(yè)
文件大?。?/td> 0K
描述: IC ADC OCT 12BIT 25MSPS 100-TQFP
標(biāo)準(zhǔn)包裝: 1
類(lèi)型: AAF,ADC,交叉點(diǎn)開(kāi)關(guān),LNA,VGA
分辨率(位): 12 b
采樣率(每秒): 25M
數(shù)據(jù)接口: 串行,SPI?
電壓電源: 模擬和數(shù)字
電源電壓: 1.8V,3V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 100-TQFP 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 100-TQFP-EP(14x14)
包裝: 托盤(pán)
AD9273
Rev. B | Page 28 of 48
Table 9. Sensitivity and Dynamic Range of Trade-Offs1, 2, 3
LNA
VGA
Postamp Gain (dB)
Channel
Gain
Full-Scale Input
(V p-p)
Input-Referred
Noise Voltage
(nV/√Hz)
Typical Output Dynamic Range
(V/V)
(dB)
GAIN+ = 0 V4
GAIN+ = 1.6 V5
Input-Referred Noise6 @
GAIN+ = 1.6 V (nV/√Hz)
6
15.6
0.733
1.6
21
65.9
62.3
1.98
24
64.1
59.7
1.91
27
61.8
57.0
1.87
30
59.2
54.1
1.85
8
17.9
0.550
1.42
21
65.9
61.6
1.66
24
64.1
58.9
1.61
27
61.8
56.2
1.58
30
59.2
53.3
1.57
12
21.3
0.367
1.26
21
65.9
60.1
1.35
24
64.1
57.3
1.32
27
61.8
54.4
1.31
30
59.2
51.5
1.30
1 LNA: output full scale = 4.4 V p-p differential.
2 Filter: loss ~ 1 dB, NBW = 13.3 MHz, GAIN = 0.8 V.
3 ADC: 40 MSPS, 70 dB SNR, 2 V p-p full-scale input.
4 Output dynamic range at minimum VGA gain (VGA dominated).
5 Output dynamic range at maximum VGA gain (LNA dominated).
6 Channel noise at maximum VGA gain.
Table 9 demonstrates the sensitivity and dynamic range of
trade-offs that can be achieved relative to various LNA and
VGA gain settings.
For example, when the VGA is set for the minimum gain voltage,
the TGC path is dominated by VGA noise and achieves the
maximum output SNR. However, as the postamp gain options
are increased, the input-referred noise is reduced and the SNR
is degraded.
If the VGA is set for the maximum gain voltage, the TGC path
is dominated by LNA noise and achieves the lowest input-
referred noise, but with degraded output SNR. The higher the
TGC (LNA + VGC) gain, the lower the output SNR. As the
postamp gain is increased, the input-referred noise is reduced.
At low gains, the VGA should limit the system noise perfor-
mance (SNR); at high gains, the noise is defined by the source and
the LNA. The maximum voltage swing is bound by the full-
scale peak-to-peak ADC input voltage (2 V p-p).
Both the LNA and VGA have full-scale limitations within each
section of the TGC path. These limitations are dependent on the
gain setting of each function block and on the voltage applied to the
GAIN+ and GAIN pins. The LNA has three limitations, or full-
scale settings, that can be applied through the SPI. Similarly, the
VGA has four postamp gain settings that can be applied through
the SPI. The voltage applied to the GAIN± pins determines
which amplifier (the LNA or VGA) saturates first. The maximum
signal input level that can be applied as a function of voltage on
the GAIN± pins for the selectable gain options of the SPI is shown
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
00.2
0.4
0.6
0.8
GAIN+ (V)
1.0
1.2
1.4
1.6
IN
P
U
T
FU
LL
-S
C
A
L
E
(
V
p-
p)
07
03
0-
1
17
PGA GAIN = 21dB
PGA GAIN = 24dB
PGA GAIN = 27dB
PGA GAIN = 30dB
Figure 48. LNA with 15.6 dB Gain Setting/VGA Full-Scale Limitations
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