參數(shù)資料
型號(hào): AD9273BBCZ-50
廠商: Analog Devices Inc
文件頁數(shù): 33/48頁
文件大?。?/td> 0K
描述: IC ADCASD OCTAL 25MSPS 144CSPBGA
標(biāo)準(zhǔn)包裝: 1
類型: AAF,ADC,交叉點(diǎn)開關(guān),LNA,VGA
分辨率(位): 12 b
采樣率(每秒): 50M
數(shù)據(jù)接口: 串行,SPI?
電壓電源: 模擬和數(shù)字
電源電壓: 1.8V,3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 144-LFBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 144-CSPBGA(10x10)
包裝: 托盤
AD9273
Rev. B | Page 39 of 48
This interface is flexible enough to be controlled by either serial
PROMS or PIC mirocontrollers. This provides the user with
an alternative method, other than a full SPI controller, for
programming the device (see the AN-812 Application Note).
If the user chooses not to use the SPI interface, these pins serve
a dual function and are associated with secondary functions
when the CSB is strapped to AVDD during device power-up.
See the SDIO Pin and SCLK Pin sections for details on which
pin-strappable functions are supported on the SPI pins.
DON’T CARE
SDIO
SCLK
CSB
tS
tDH
tHI
tCLK
tLO
tDS
tH
R/W
W1
W0
A12
A11
A10
A9
A8
A7
D5
D4
D3
D2
D1
D0
07
030
-0
68
Figure 70. Serial Timing Details
Table 16. Serial Timing Definitions
Parameter
Minimum Timing (ns)
Description
tDS
5
Setup time between the data and the rising edge of SCLK
tDH
2
Hold time between the data and the rising edge of SCLK
tCLK
40
Period of the clock
tS
5
Setup time between CSB and SCLK
tH
2
Hold time between CSB and SCLK
tHI
16
Minimum period that SCLK should be in a logic high state
tLO
16
Minimum period that SCLK should be in a logic low state
tEN_SDIO
10
Minimum time for the SDIO pin to switch from an input to an output relative to the SCLK
falling edge (not shown in Figure 70)
tDIS_SDIO
10
Minimum time for the SDIO pin to switch from an output to an input relative to the SCLK
rising edge (not shown in Figure 70)
相關(guān)PDF資料
PDF描述
AD9276BSVZ IC ADC 12BIT LNA/VGA/AAF 100TQFP
AD9277BSVZ IC ADC 14BIT LNA/VGA/AAF 100TQFP
AD9278BBCZ IC ADC 12BIT 50MSPS 144CSPBGA
AD9279BBCZ IC ADC 12BIT 80MSPS 144CSPBGA
AD9393BBCZRL-80 IC INTERFACE 80MHZ HDMI 76CSPBGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9273BSVZ-25 功能描述:IC ADC OCT 12BIT 25MSPS 100-TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 類型:數(shù)據(jù)采集系統(tǒng)(DAS) 分辨率(位):16 b 采樣率(每秒):21.94k 數(shù)據(jù)接口:MICROWIRE?,QSPI?,串行,SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN-EP(6x6) 包裝:托盤
AD9273BSVZ-40 功能描述:IC ADC OCT 12BIT 40MSPS 100-TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 類型:數(shù)據(jù)采集系統(tǒng)(DAS) 分辨率(位):16 b 采樣率(每秒):21.94k 數(shù)據(jù)接口:MICROWIRE?,QSPI?,串行,SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN-EP(6x6) 包裝:托盤
AD9273BSVZ-50 功能描述:IC ADC ASD OCTAL 50MSPS 100-TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 類型:數(shù)據(jù)采集系統(tǒng)(DAS) 分辨率(位):16 b 采樣率(每秒):21.94k 數(shù)據(jù)接口:MICROWIRE?,QSPI?,串行,SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN-EP(6x6) 包裝:托盤
AD9273BSVZRL-25 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12Bit 25 MSPS Octal ADC RoHS:否 制造商:Analog Devices 通道數(shù)量: 結(jié)構(gòu): 轉(zhuǎn)換速率: 分辨率: 輸入類型: 信噪比: 接口類型: 工作電源電壓: 最大工作溫度: 安裝風(fēng)格: 封裝 / 箱體:
AD9273BSVZRL-40 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12Bit 40 MSPS Octal ADC RoHS:否 制造商:Analog Devices 通道數(shù)量: 結(jié)構(gòu): 轉(zhuǎn)換速率: 分辨率: 輸入類型: 信噪比: 接口類型: 工作電源電壓: 最大工作溫度: 安裝風(fēng)格: 封裝 / 箱體: