參數(shù)資料
型號: AD9272-65EBZ
廠商: Analog Devices Inc
文件頁數(shù): 31/44頁
文件大?。?/td> 0K
描述: BOARD EVAL AD9272
設(shè)計資源: Powering AD9272 with ADP5020 Switching Regulator PMU for Increased Efficiency (CN0135)
標(biāo)準(zhǔn)包裝: 1
ADC 的數(shù)量: 8
位數(shù): 12
采樣率(每秒): 65M
數(shù)據(jù)接口: 串行
輸入范圍: 733 mVpp
在以下條件下的電源(標(biāo)準(zhǔn)): 1.69W @ 65MSPS
工作溫度: -40°C ~ 85°C
已用 IC / 零件: AD9272
已供物品: 板,電源
相關(guān)產(chǎn)品: AD9272BSVZRL-80-ND - IC ADC ASD OCTAL 80MSPS 100-TQFP
AD9272BSVZRL-65-ND - IC ADC ASD OCTAL 65MSPS 100-TQFP
AD9272BSVZRL-40-ND - IC ADC ASD OCTAL 40MSPS 100-TQFP
AD9272BSVZ-80-ND - IC ADC OCT 12BIT 80MSPS 100-TQFP
AD9272BSVZ-65-ND - IC ADC OCT 12BIT 65MSPS 100-TQFP
AD9272BSVZ-40-ND - IC ADC OCT 12BIT 40MSPS 100-TQFP
AD9272
Rev. C | Page 37 of 44
Power and Ground Recommendations
When connecting power to the AD9272, it is recommended
that two separate 1.8 V supplies be used: one for analog (AVDD)
and one for digital (DRVDD). If only one 1.8 V supply is
available, it should be routed to the AVDD1 first and then
tapped off and isolated with a ferrite bead or a filter choke
preceded by decoupling capacitors for the DRVDD. The user
should employ several decoupling capacitors on all supplies to
cover both high and low frequencies. These should be located
close to the point of entry at the PC board level and close to the
parts with minimal trace lengths.
A single PC board ground plane should be sufficient when
using the AD9272. With proper decoupling and smart parti-
tioning of the analog, digital, and clock sections of the PC
board, optimum performance can be easily achieved.
Exposed Paddle Thermal Heat Slug Recommendations
It is required that the exposed paddle on the underside of the
device be connected to a quiet analog ground to achieve the
best electrical and thermal performance of the AD9272. An
exposed continuous copper plane on the PCB should mate to
the AD9272 exposed paddle, Pin 0. The copper plane should
have several vias to achieve the lowest possible resistive thermal
path for heat dissipation to flow through the bottom of the PCB.
These vias should be filled or plugged with nonconductive epoxy.
To maximize the coverage and adhesion between the device and
PCB, partition the continuous copper pad by overlaying a silk-
screen or solder mask to divide it into several uniform sections.
This ensures several tie points between the two during the reflow
process. Using one continuous plane with no partitions only
guarantees one tie point between the AD9272 and PCB. See
Figure 67 for a PCB layout example. For more detailed infor-
mation on packaging and for more PCB layout examples, see
the AN-772 Application Note.
SILKSCREEN PARTITION
PIN 1 INDICATOR
07
02
9-
06
9
Figure 67. Typical PCB Layout
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