參數(shù)資料
型號: AD9236BCPZRL7-80
廠商: Analog Devices Inc
文件頁數(shù): 11/36頁
文件大?。?/td> 0K
描述: IC ADC 12BIT 80MSPS 32LFCSP
標準包裝: 1,500
位數(shù): 12
采樣率(每秒): 80M
數(shù)據接口: 并聯(lián)
轉換器數(shù)目: 2
功率耗散(最大): 366mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,CSP
供應商設備封裝: 32-LFCSP-VQ(5x5)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 個單端,單極;1 個差分,單極
Data Sheet
AD9236
Rev. C | Page 19 of 36
LFCSP Evaluation Board
The typical bench setup used to evaluate the ac performance of
the AD9236 is similar to the TSSOP evaluation board
connections. The AD9236 can be driven single-ended or
differentially through a transformer. Separate power pins are
provided to isolate the DUT from the support circuitry. Each
input configuration can be selected by proper connection of
various jumpers (see Figure 48).
An alternative differential analog input path using an AD8351
op amp is included in the layout but is not populated in
production. Designers interested in evaluating the op amp with
the ADC should remove C15, R12, and R3 and populate the op
amp circuit. The passive network between the AD8351 outputs
and the AD9236 allows the user to optimize the frequency
response of the op amp for their application.
03066-0-024
DATA
CAPTURE
AND
PROCESSING
3V
+
3V
+
3V
+
3V
+
REFIN
10MHz
REFOUT
HP8644, 2V p-p
SIGNAL SYNTHESIZER
HP8644, 2V p-p
CLOCK SYNTHESIZER
BAND-PASS
FILTER
S4
XFMR
INPUT
S1
CLOCK
AVDD
DUT
AVDD
GND
GND DUT
DRVDD
DVDD
AD9236
EVALUATION BOARD
J1
CLOCK
DIVIDER
Figure 37. TSSOP Evaluation Board Connections
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