參數(shù)資料
型號(hào): AD9228ABCPZRL7-65
廠商: Analog Devices Inc
文件頁數(shù): 34/56頁
文件大?。?/td> 0K
描述: IC ADC 12BIT SPI/SRL 65M 48LFCSP
標(biāo)準(zhǔn)包裝: 750
位數(shù): 12
采樣率(每秒): 65M
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 4
功率耗散(最大): 510mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 48-LFCSP-VQ(7x7)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 8 個(gè)單端,單極;4 個(gè)差分,單極
AD9228
Data Sheet
Rev. E | Page 4 of 56
SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, 2 V p-p differential input, 1.0 V internal reference, AIN = 0.5 dBFS, unless otherwise noted.
Table 1.
AD9228-40
AD9228-65
Parameter1
Temperature
Min
Typ
Max
Min
Typ
Max
Unit
RESOLUTION
12
Bits
ACCURACY
No Missing Codes
Full
Guaranteed
Offset Error
Full
±1
±8
±1
±8
mV
Offset Matching
Full
±2
±8
±2
±8
mV
Gain Error
Full
±0.4
±1.2
±2
±3.5
% FS
Gain Matching
Full
±0.3
±0.7
±0.3
±0.7
% FS
Differential Nonlinearity (DNL)
Full
±0.25
±0.5
±0.3
±0.65
LSB
Integral Nonlinearity (INL)
Full
±0.4
±1
±0.4
±1
LSB
TEMPERATURE DRIFT
Offset Error
Full
±2
ppm/°C
Gain Error
Full
±17
ppm/°C
Reference Voltage (1 V Mode)
Full
±21
ppm/°C
REFERENCE
Output Voltage Error (VREF = 1 V)
Full
±2
±30
±2
±30
mV
Load Regulation at 1.0 mA (VREF = 1 V)
Full
3
mV
Input Resistance
Full
6
ANALOG INPUTS
Differential Input Voltage (VREF = 1 V)
Full
2
V p-p
Common-Mode Voltage
Full
AVDD/2
V
Differential Input Capacitance
Full
7
pF
Analog Bandwidth, Full Power
Full
315
MHz
POWER SUPPLY
AVDD
Full
1.7
1.8
1.9
1.7
1.8
1.9
V
DRVDD
Full
1.7
1.8
1.9
1.7
1.8
1.9
V
IAVDD
Full
155
170
232
245
mA
IDRVDD
Full
31
34
38
mA
Total Power Dissipation (Including Output Drivers)
Full
335
367
478
510
mW
Power-Down Dissipation
Full
2
5.8
2
5.8
mW
Standby Dissipation2
Full
72
mW
CROSSTALK
Full
100
dB
CROSSTALK (Overrange Condition)3
Full
100
dB
1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for definitions and for details on how these tests were completed.
2 Can be controlled via the SPI.
3 Overrange condition is specific with 6 dB of the full-scale input range.
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