- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄375248 > AD9222BCPZRL7-40 (ANALOG DEVICES INC) Octal, 12-Bit, 40/50 MSPS Serial LVDS 1.8 V A/D Converter PDF資料下載
參數(shù)資料
| 型號： | AD9222BCPZRL7-40 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | Octal, 12-Bit, 40/50 MSPS Serial LVDS 1.8 V A/D Converter |
| 中文描述： | 8-CH 12-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, QCC64 |
| 封裝： | 9 X 9 MM, ROHS COMPLIANT, MO-220VMMD-4, LFCSP-64 |
| 文件頁數(shù)： | 20/56頁 |
| 文件大?。?/td> | 2026K |
| 代理商： | AD9222BCPZRL7-40 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁當前第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁
AD9222
For best dynamic performance, the source impedances driving
VIN+ and VIN should be matched such that common-mode
settling errors are symmetrical. These errors are reduced by the
common-mode rejection of the ADC. An internal reference
buffer creates the positive and negative reference voltages, REFT
and REFB, respectively, that define the span of the ADC core.
The output common-mode of the reference buffer is set to
midsupply, and the REFT and REFB voltages and span are
defined as
REFT
= 1/2 (
AVDD
+
VREF
)
REFB
= 1/2 (
AVDD
VREF
)
Span
= 2 × (
REFT
REFB
) = 2 ×
VREF
It can be seen from these equations that the REFT and REFB
voltages are symmetrical about the midsupply voltage and, by
definition, the input span is twice the value of the VREF voltage.
Maximum SNR performance is always achieved by setting the
ADC to the largest span in a differential configuration. In the
case of the AD9222, the largest input span available is 2 V p-p.
Differential Input Configurations
There are several ways in which to drive the AD9222 either
actively or passively. In either case, the optimum performance is
achieved by driving the analog input differentially. One example
is by using the AD8334 differential driver. It provides excellent
performance and a flexible interface to the ADC (see Figure 44)
for baseband applications. This configuration is common for
medical ultrasound systems.
However, the noise performance of most amplifiers is not
adequate to achieve the true performance of the AD9222. For
applications where SNR is a key parameter, differential transfor-
mer coupling is the recommended input configuration. Two
examples are shown in Figure 41 and Figure 42.
In any configuration, the value of the shunt capacitor, C, is
dependent on the input frequency and may need to be reduced
or removed.
Rev. 0 | Page 20 of 56
2Vp-p
R
R
1
C
DIFF
C
1
C
DIFF
IS OPTIONAL.
49.9
0.1
μ
F
1k
1k
AGND
AVDD
ADT1–1WT
1:1 Z RATIO
VIN–
ADC
AD9222
VIN+
C
0
Figure 41. Differential Transformer-Coupled Configuration
for Baseband Applications
ADC
AD9222
VIN–
2Vp-p
2.2pF
33
1k
0.1
μ
F
1k
1k
AVDD
ADT1–1WT
1:1 Z RATIO
16nH
16nH
0.1
μ
F
16nH
33
499
65
VIN+
0
Figure 42. Differential Transformer-Coupled Configuration for IF Applications
Single-Ended Input Configuration
A single-ended input may provide adequate performance in
cost-sensitive applications. In this configuration, SFDR and
distortion performance degrade due to the large input common-
mode swing. If the application requires a single-ended input
configuration, ensure that the source impedances on each input
are well matched in order to achieve the best possible performance.
A full-scale input of 2 V p-p can still be applied to the ADC’s VIN+
pin while the VIN pin is terminated. Figure 43 details a typical
single-ended input configuration.
2V p-p
R
R
49.9
0.1μF
0.1μF
AVDD
1k
25
1k
1k
AVDD
VIN–
ADC
AD9222
VIN+
1
C
DIFF
C
1
C
DIFF
IS OPTIONAL.
C
0
Figure 43. Single-Ended Input Configuration
AD8334
1.0k
1.0k
374
187
R
R
C
0.1
μ
F
187
0.1
μ
F
0.1
μ
F
0.1
μ
F
0.1
μ
F
10
μ
F
0.1
μ
F
1V p-p
0.1
μ
F
LNA
120nH
VGA
VOH
VIP
INH
22pF
LMD
VIN
LOP
LON
VOL
18nF
274
VIN–
ADC
AD9222
VIN+
VREF
0
Figure 44. Differential Input Configuration Using the AD8334
相關PDF資料 |
PDF描述 |
|---|---|
| AD9222BCPZRL7-50 | Octal, 12-Bit, 40/50 MSPS Serial LVDS 1.8 V A/D Converter |
| AD9560KN | High Speed Monolithic Pulse Width Modulator |
| AD9560KR | High Speed Monolithic Pulse Width Modulator |
| AD9560 | High Speed Monolithic PWM(高速單片PWM) |
| AD9561JR-REEL | Pulse Width Modulator |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD9222BCPZRL7-50 | 制造商:Analog Devices 功能描述:ADC Octal Pipelined 50Msps 12-bit Serial 64-Pin LFCSP EP T/R |
| AD9222BCPZRL7-65 | 制造商:Analog Devices 功能描述: |
| AD9223 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete 12-Bit 1.5/3.0/10.0 MSPS Monolithic A/D Converters |
| AD9223AR | 制造商:Analog Devices 功能描述:ADC Single Pipelined 3Msps 12-bit Parallel 28-Pin SOIC W 制造商:Rochester Electronics LLC 功能描述:12-BIT, 1.5/3.0/10 MSPS A/D CONVERTER - Bulk 制造商:Analog Devices 功能描述:IC 12-BIT ADC |
| AD9223AR-REEL | 制造商:Analog Devices 功能描述:ADC Single Pipelined 3Msps 12-bit Parallel 28-Pin SOIC W T/R |
發(fā)布緊急采購，3分鐘左右您將得到回復。