參數(shù)資料
型號： AD9219-65EB
廠商： Analog Devices, Inc.
英文描述： Quad, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
中文描述： 四，10位，六十五分之四十○MSPS的串行LVDS 1.8弗吉尼亞州/ D轉(zhuǎn)換器
文件頁數(shù)： 27/52頁
文件大?。?/td> 1571K
代理商： AD9219-65EB
AD9219
Rev. 0 | Page 27 of 52
90
70
75
85
80
65
60
55
70
50
55
65
60
45
40
35
2
18
4
6
8
12
14
16
10
0
S
S
RESISTANCE (k
)
SNR
SFDR
Figure 62. SFDR vs. RBIAS
0
100
200
300
400
500
600
C
RESISTANCE (k
)
0
2
8
10
12
16
18
6
4
Figure 63. IAVDD vs. RBIAS
Voltage Reference
A stable and accurate 0.5 V voltage reference is built into the
AD9219. This is gained up by a factor of 2 internally, setting
V
REF
to 1.0 V, which results in a full-scale differential input span
of 2 V p-p. The V
REF
is set internally by default; however, the
VREF pin can be driven externally with a 1.0 V reference to
achieve more accuracy.
When applying the decoupling capacitors to the VREF, REFT,
and REFB pins, use ceramic low ESR capacitors. These capacitors
should be close to the ADC pins and on the same layer of the
PCB as the AD9219. The recommended capacitor values and
configurations for the AD9219 reference pin can be found in
Figure 64.
Table 12. Reference Settings
Selected
Mode
External
Reference
Internal,
2 V p-p FSR
SENSE
Voltage
AVDD
Resulting
VREF (V)
N/A
Resulting
Differential
Span (V p-p)
2 × external
reference
2.0
AGND to 0.2 V
1.0
Internal Reference Operation
A comparator within the AD9219 detects the potential at the
SENSE pin and configures the reference. If SENSE is grounded,
the reference amplifier switch is connected to the internal
resistor divider (see Figure 64), setting VREF to 1 V.
The REFT and REFB pins establish their input span of the ADC
core from the reference configuration. The analog input full-
scale range of the ADC equals twice the voltage at the reference
pin for either an internal or an external reference configuration.
If the reference of the AD9219 is used to drive multiple
converters to improve gain matching, the loading of the refer-
ence by the other converters must be considered. Figure 66
depicts how the internal reference voltage is affected by loading.
1μF
0.1μF
V
REF
SENSE
0.5V
REFT
0.1μF
0.1μF
2.2μF
0.1μF
REFB
SELECT
LOGIC
ADC
CORE
+
VIN–
VIN+
0
Figure 64. Internal Reference Configuration
1μF
0.1μF
R2
V
REF
0.5V
REFT
0.1μF
0.1μF
2.2μF
0.1μF
REFB
SELECT
LOGIC
ADC
CORE
+
+
VIN–
VIN+
SENSE
R1
0
Figure 65. External Reference Operation
相關(guān)PDF資料
PDF描述
AD9219BCPZRL-65 Quad, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
AD9219BCPZRL-40 Quad, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
AD9219BCPZ-40 Quad, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
AD9222 Octal, 12-Bit, 40/50 MSPS Serial LVDS 1.8 V A/D Converter
AD9222-50EBZ Octal, 12-Bit, 40/50 MSPS Serial LVDS 1.8 V A/D Converter
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