參數(shù)資料
型號(hào): AD9051
廠(chǎng)商: Analog Devices, Inc.
英文描述: 10-Bit, 60 MSPS A/D Converter
中文描述: 10位,60 MSPS的A / D轉(zhuǎn)換
文件頁(yè)數(shù): 5/12頁(yè)
文件大?。?/td> 142K
代理商: AD9051
AD9051
–5–
REV. A
PIN FUNCTION DESCRIPTIONS
Pin No.
Name
Function
1, 6, 7, 12, 21, 23
2, 8, 11
3
4
5
9
10
13
GND
V
D
VREFOUT
VREFIN
BWSEL
AINB
AIN
ENCODE
Ground.
Analog +5 V power supply.
Internal bandgap voltage reference (nominally +2.5 V).
Input to reference amplifier. Voltage reference for ADC is connected here.
Bandwidth Select. NC = 130 MHz nominal. +V
D
= 50 MHz nominal.
Complementary analog input pin (Analog input bar).
Analog input pin.
Encode clock input to ADC. Internal T/H is placed in hold mode (ADC is encoding)
on rising edge of encode signal.
Out of range signal. Logic “0” when analog input is in nominal range. Logic “1” when
analog input is out of nominal range.
Most significant bit of ADC output.
Digital output bits of ADC.
Digital output power supply (only used by digital outputs).
Digital output bits of ADC.
Least significant bit of ADC output.
14
OR
15
16–19
20, 22
24–27
28
D9 (MSB)
D8–D5
V
DD
D4–D1
D0 (LSB)
PIN CONFIGURATION
14
13
12
11
10
9
8
1
2
3
4
7
6
5
17
16
20
28
27
26
25
24
23
22
21
19
18
15
TOP VIEW
(Not to Scale)
AD9051
GND
D3
D2
D1
D0 (LSB)
V
D
VREFOUT
VREFIN
V
DD
GND
D4
BWSEL
GND
GND
V
D
AINB
AIN
D5
V
DD
GND
V
D
GND
ENCODE
OR
D6
D9 (MSB)
D8
D7
N
N + 1
N + 2
N + 3
N + 4
N + 5
AIN
ENCODE
DIGITAL
OUTPUTS
t
A
t
EH
t
EL
t
PD
N – 5
N – 4
N – 3
N – 2
N – 1
N
Figure 1. Timing Diagram
12k
V
12k
V
12k
V
12k
V
AINB (PIN 9)
AIN (PIN 10)
INPUT
BUFFER
V
D
V
DD
(PINS 20, 22)
+3V TO +5V
D0–D9, OR
V
D
ENCODE
(PIN 13)
V
D
VREF
OUT
(PIN 3)
Figure 2. Equivalent Circuits
Analog Input Encode
Output Stage VREF
相關(guān)PDF資料
PDF描述
AD9051-2V 10-Bit, 60 MSPS A/D Converter
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